shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
llvm-project/llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
Elvis Wang 51b3b9b039
[LV] Optimize x && (x && y) -> x && y (#185806) 
This patch removes the extra logical-and in `x && (x && y)` and `x && (y && x)` to `x && y`.
This helps to simplify mask calculation in the FindLast reduction and
exposes more opportunities to replace to EVL.

PR link: https://github.com/llvm/llvm-project/pull/185806
2026-03-17 13:03:04 +08:00

328 lines
16 KiB
LLVM
Raw Blame History

; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 6
; RUN: opt -passes=loop-vectorize -vplan-print-after="optimize$" \
; RUN: -force-vector-width=4 -disable-output 2>&1 < %s | FileCheck %s
; RUN: opt -passes=loop-vectorize -vplan-print-after="optimize$" \
; RUN: -force-vector-width=4 -force-target-supports-masked-memory-ops \
; RUN: -prefer-predicate-over-epilogue=predicate-dont-vectorize \
; RUN: -disable-output 2>&1 < %s | FileCheck %s --check-prefix=CHECK-TF
; This function is derived from the following C program:
; int simple_csa_int_select(int N, int *data, int a) {
; int t = -1;
; for (int i = 0; i < N; i++) {
; if (a < data[i])
; t = data[i];
; }
; return t;
; }
define i32 @simple_csa_int_select(i64 %N, ptr %data, i32 %a) {
; CHECK-LABEL: VPlan for loop in 'simple_csa_int_select'
; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
; CHECK-NEXT: Live-in vp<[[VP0:%[0-9]+]]> = VF
; CHECK-NEXT: Live-in vp<[[VP1:%[0-9]+]]> = VF * UF
; CHECK-NEXT: Live-in vp<[[VP2:%[0-9]+]]> = vector-trip-count
; CHECK-NEXT: Live-in ir<%N> = original trip-count
; CHECK-EMPTY:
; CHECK-NEXT: ir-bb<entry>:
; CHECK-NEXT: Successor(s): scalar.ph, vector.ph
; CHECK-EMPTY:
; CHECK-NEXT: vector.ph:
; CHECK-NEXT: Successor(s): vector loop
; CHECK-EMPTY:
; CHECK-NEXT: <x1> vector loop: {
; CHECK-NEXT: vector.body:
; CHECK-NEXT: EMIT vp<[[VP3:%[0-9]+]]> = CANONICAL-INDUCTION ir<0>, vp<%index.next>
; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%data.phi> = phi ir<-1>, vp<[[VP9:%[0-9]+]]>
; CHECK-NEXT: WIDEN-PHI vp<[[VP4:%[0-9]+]]> = phi [ ir<false>, vector.ph ], [ vp<[[VP8:%[0-9]+]]>, vector.body ]
; CHECK-NEXT: vp<[[VP5:%[0-9]+]]> = SCALAR-STEPS vp<[[VP3]]>, ir<1>, vp<[[VP0]]>
; CHECK-NEXT: CLONE ir<%ld.addr> = getelementptr inbounds ir<%data>, vp<[[VP5]]>
; CHECK-NEXT: vp<[[VP6:%[0-9]+]]> = vector-pointer inbounds ir<%ld.addr>
; CHECK-NEXT: WIDEN ir<%ld> = load vp<[[VP6]]>
; CHECK-NEXT: WIDEN ir<%select.cmp> = icmp slt ir<%a>, ir<%ld>
; CHECK-NEXT: EMIT vp<[[VP7:%[0-9]+]]> = any-of ir<%select.cmp>
; CHECK-NEXT: EMIT vp<[[VP8]]> = select vp<[[VP7]]>, ir<%select.cmp>, vp<[[VP4]]>
; CHECK-NEXT: EMIT vp<[[VP9]]> = select vp<[[VP7]]>, ir<%ld>, ir<%data.phi>
; CHECK-NEXT: EMIT vp<%index.next> = add nuw vp<[[VP3]]>, vp<[[VP1]]>
; CHECK-NEXT: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]>
; CHECK-NEXT: No successors
; CHECK-NEXT: }
; CHECK-NEXT: Successor(s): middle.block
; CHECK-EMPTY:
; CHECK-NEXT: middle.block:
; CHECK-NEXT: EMIT vp<[[VP11:%[0-9]+]]> = extract-last-active ir<-1>, vp<[[VP9]]>, vp<[[VP8]]>
; CHECK-NEXT: EMIT vp<%cmp.n> = icmp eq ir<%N>, vp<[[VP2]]>
; CHECK-NEXT: EMIT branch-on-cond vp<%cmp.n>
; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph
; CHECK-EMPTY:
; CHECK-NEXT: ir-bb<exit>:
; CHECK-NEXT: IR %select.data.lcssa = phi i32 [ %select.data, %loop ] (extra operand: vp<[[VP11]]> from middle.block)
; CHECK-NEXT: No successors
; CHECK-EMPTY:
; CHECK-NEXT: scalar.ph:
; CHECK-NEXT: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[VP2]]>, middle.block ], [ ir<0>, ir-bb<entry> ]
; CHECK-NEXT: EMIT-SCALAR vp<%bc.merge.rdx> = phi [ vp<[[VP11]]>, middle.block ], [ ir<-1>, ir-bb<entry> ]
; CHECK-NEXT: Successor(s): ir-bb<loop>
; CHECK-EMPTY:
; CHECK-NEXT: ir-bb<loop>:
; CHECK-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] (extra operand: vp<%bc.resume.val> from scalar.ph)
; CHECK-NEXT: IR %data.phi = phi i32 [ -1, %entry ], [ %select.data, %loop ] (extra operand: vp<%bc.merge.rdx> from scalar.ph)
; CHECK-NEXT: IR %ld.addr = getelementptr inbounds i32, ptr %data, i64 %iv
; CHECK-NEXT: IR %ld = load i32, ptr %ld.addr, align 4
; CHECK-NEXT: IR %select.cmp = icmp slt i32 %a, %ld
; CHECK-NEXT: IR %select.data = select i1 %select.cmp, i32 %ld, i32 %data.phi
; CHECK-NEXT: IR %iv.next = add nuw nsw i64 %iv, 1
; CHECK-NEXT: IR %exit.cmp = icmp eq i64 %iv.next, %N
; CHECK-NEXT: No successors
; CHECK-NEXT: }
;
; CHECK-TF-LABEL: VPlan for loop in 'simple_csa_int_select'
; CHECK-TF: VPlan 'Initial VPlan for VF={4},UF>=1' {
; CHECK-TF-NEXT: Live-in vp<[[VP0:%[0-9]+]]> = VF
; CHECK-TF-NEXT: Live-in vp<[[VP1:%[0-9]+]]> = VF * UF
; CHECK-TF-NEXT: Live-in vp<[[VP2:%[0-9]+]]> = vector-trip-count
; CHECK-TF-NEXT: Live-in vp<[[VP3:%[0-9]+]]> = backedge-taken count
; CHECK-TF-NEXT: Live-in ir<%N> = original trip-count
; CHECK-TF-EMPTY:
; CHECK-TF-NEXT: ir-bb<entry>:
; CHECK-TF-NEXT: Successor(s): scalar.ph, vector.ph
; CHECK-TF-EMPTY:
; CHECK-TF-NEXT: vector.ph:
; CHECK-TF-NEXT: Successor(s): vector loop
; CHECK-TF-EMPTY:
; CHECK-TF-NEXT: <x1> vector loop: {
; CHECK-TF-NEXT: vector.body:
; CHECK-TF-NEXT: EMIT vp<[[VP4:%[0-9]+]]> = CANONICAL-INDUCTION ir<0>, vp<%index.next>
; CHECK-TF-NEXT: WIDEN-REDUCTION-PHI ir<%data.phi> = phi ir<-1>, vp<[[VP13:%[0-9]+]]>
; CHECK-TF-NEXT: WIDEN-PHI vp<[[VP5:%[0-9]+]]> = phi [ ir<false>, vector.ph ], [ vp<[[VP12:%[0-9]+]]>, vector.body ]
; CHECK-TF-NEXT: vp<[[VP6:%[0-9]+]]> = SCALAR-STEPS vp<[[VP4]]>, ir<1>, vp<[[VP0]]>
; CHECK-TF-NEXT: EMIT vp<[[VP7:%[0-9]+]]> = WIDEN-CANONICAL-INDUCTION vp<[[VP4]]>
; CHECK-TF-NEXT: EMIT vp<[[VP8:%[0-9]+]]> = icmp ule vp<[[VP7]]>, vp<[[VP3]]>
; CHECK-TF-NEXT: CLONE ir<%ld.addr> = getelementptr inbounds ir<%data>, vp<[[VP6]]>
; CHECK-TF-NEXT: vp<[[VP9:%[0-9]+]]> = vector-pointer inbounds ir<%ld.addr>
; CHECK-TF-NEXT: WIDEN ir<%ld> = load vp<[[VP9]]>, vp<[[VP8]]>
; CHECK-TF-NEXT: WIDEN ir<%select.cmp> = icmp slt ir<%a>, ir<%ld>
; CHECK-TF-NEXT: EMIT vp<[[VP10:%[0-9]+]]> = logical-and vp<[[VP8]]>, ir<%select.cmp>
; CHECK-TF-NEXT: EMIT vp<[[VP11:%[0-9]+]]> = any-of vp<[[VP10]]>
; CHECK-TF-NEXT: EMIT vp<[[VP12]]> = select vp<[[VP11]]>, vp<[[VP10]]>, vp<[[VP5]]>
; CHECK-TF-NEXT: EMIT vp<[[VP13]]> = select vp<[[VP11]]>, ir<%ld>, ir<%data.phi>
; CHECK-TF-NEXT: EMIT vp<%index.next> = add vp<[[VP4]]>, vp<[[VP1]]>
; CHECK-TF-NEXT: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]>
; CHECK-TF-NEXT: No successors
; CHECK-TF-NEXT: }
; CHECK-TF-NEXT: Successor(s): middle.block
; CHECK-TF-EMPTY:
; CHECK-TF-NEXT: middle.block:
; CHECK-TF-NEXT: EMIT vp<[[VP15:%[0-9]+]]> = extract-last-active ir<-1>, vp<[[VP13]]>, vp<[[VP12]]>
; CHECK-TF-NEXT: Successor(s): ir-bb<exit>
; CHECK-TF-EMPTY:
; CHECK-TF-NEXT: ir-bb<exit>:
; CHECK-TF-NEXT: IR %select.data.lcssa = phi i32 [ %select.data, %loop ] (extra operand: vp<[[VP15]]> from middle.block)
; CHECK-TF-NEXT: No successors
; CHECK-TF-EMPTY:
; CHECK-TF-NEXT: scalar.ph:
; CHECK-TF-NEXT: EMIT-SCALAR vp<%bc.resume.val> = phi [ ir<0>, ir-bb<entry> ]
; CHECK-TF-NEXT: EMIT-SCALAR vp<%bc.merge.rdx> = phi [ ir<-1>, ir-bb<entry> ]
; CHECK-TF-NEXT: Successor(s): ir-bb<loop>
; CHECK-TF-EMPTY:
; CHECK-TF-NEXT: ir-bb<loop>:
; CHECK-TF-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] (extra operand: vp<%bc.resume.val> from scalar.ph)
; CHECK-TF-NEXT: IR %data.phi = phi i32 [ -1, %entry ], [ %select.data, %loop ] (extra operand: vp<%bc.merge.rdx> from scalar.ph)
; CHECK-TF-NEXT: IR %ld.addr = getelementptr inbounds i32, ptr %data, i64 %iv
; CHECK-TF-NEXT: IR %ld = load i32, ptr %ld.addr, align 4
; CHECK-TF-NEXT: IR %select.cmp = icmp slt i32 %a, %ld
; CHECK-TF-NEXT: IR %select.data = select i1 %select.cmp, i32 %ld, i32 %data.phi
; CHECK-TF-NEXT: IR %iv.next = add nuw nsw i64 %iv, 1
; CHECK-TF-NEXT: IR %exit.cmp = icmp eq i64 %iv.next, %N
; CHECK-TF-NEXT: No successors
; CHECK-TF-NEXT: }
;
entry:
br label %loop
loop:
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
%data.phi = phi i32 [ -1, %entry ], [ %select.data, %loop ]
%ld.addr = getelementptr inbounds i32, ptr %data, i64 %iv
%ld = load i32, ptr %ld.addr, align 4
%select.cmp = icmp slt i32 %a, %ld
%select.data = select i1 %select.cmp, i32 %ld, i32 %data.phi
%iv.next = add nuw nsw i64 %iv, 1
%exit.cmp = icmp eq i64 %iv.next, %N
br i1 %exit.cmp, label %exit, label %loop
exit:
ret i32 %select.data
}
; This function is derived from the following C program:
; int simple_csa_int_load(int* a, int* b, int default_val, int N, int threshold) {
; int result = default_val;
; for (int i = 0; i < N; ++i)
; if (a[i] > threshold)
; result = b[i];
; return result;
; }
define i32 @simple_csa_int_load(ptr noalias %a, ptr noalias %b, i32 %default_val, i64 %N, i32 %threshold) {
; CHECK-LABEL: VPlan for loop in 'simple_csa_int_load'
; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
; CHECK-NEXT: Live-in vp<[[VP0:%[0-9]+]]> = VF
; CHECK-NEXT: Live-in vp<[[VP1:%[0-9]+]]> = VF * UF
; CHECK-NEXT: Live-in vp<[[VP2:%[0-9]+]]> = vector-trip-count
; CHECK-NEXT: Live-in ir<%N> = original trip-count
; CHECK-EMPTY:
; CHECK-NEXT: ir-bb<entry>:
; CHECK-NEXT: Successor(s): scalar.ph, vector.ph
; CHECK-EMPTY:
; CHECK-NEXT: vector.ph:
; CHECK-NEXT: Successor(s): vector loop
; CHECK-EMPTY:
; CHECK-NEXT: <x1> vector loop: {
; CHECK-NEXT: vector.body:
; CHECK-NEXT: EMIT vp<[[VP3:%[0-9]+]]> = CANONICAL-INDUCTION ir<0>, vp<%index.next>
; CHECK-NEXT: WIDEN-REDUCTION-PHI ir<%data.phi> = phi ir<%default_val>, vp<[[VP11:%[0-9]+]]>
; CHECK-NEXT: WIDEN-PHI vp<[[VP4:%[0-9]+]]> = phi [ ir<false>, vector.ph ], [ vp<[[VP10:%[0-9]+]]>, if.then.0 ]
; CHECK-NEXT: vp<[[VP5:%[0-9]+]]> = SCALAR-STEPS vp<[[VP3]]>, ir<1>, vp<[[VP0]]>
; CHECK-NEXT: CLONE ir<%a.addr> = getelementptr inbounds nuw ir<%a>, vp<[[VP5]]>
; CHECK-NEXT: vp<[[VP6:%[0-9]+]]> = vector-pointer inbounds nuw ir<%a.addr>
; CHECK-NEXT: WIDEN ir<%ld.a> = load vp<[[VP6]]>
; CHECK-NEXT: WIDEN ir<%if.cond> = icmp sgt ir<%ld.a>, ir<%threshold>
; CHECK-NEXT: Successor(s): pred.load
; CHECK-EMPTY:
; CHECK-NEXT: <xVFxUF> pred.load: {
; CHECK-NEXT: pred.load.entry:
; CHECK-NEXT: BRANCH-ON-MASK ir<%if.cond>
; CHECK-NEXT: Successor(s): pred.load.if, pred.load.continue
; CHECK-EMPTY:
; CHECK-NEXT: pred.load.if:
; CHECK-NEXT: vp<[[VP7:%[0-9]+]]> = SCALAR-STEPS vp<[[VP3]]>, ir<1>, vp<[[VP0]]>
; CHECK-NEXT: REPLICATE ir<%b.addr> = getelementptr inbounds nuw ir<%b>, vp<[[VP7]]>
; CHECK-NEXT: REPLICATE ir<%ld.b> = load ir<%b.addr> (S->V)
; CHECK-NEXT: Successor(s): pred.load.continue
; CHECK-EMPTY:
; CHECK-NEXT: pred.load.continue:
; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<[[VP8:%[0-9]+]]> = ir<%ld.b>
; CHECK-NEXT: No successors
; CHECK-NEXT: }
; CHECK-NEXT: Successor(s): if.then.0
; CHECK-EMPTY:
; CHECK-NEXT: if.then.0:
; CHECK-NEXT: EMIT vp<[[VP9:%[0-9]+]]> = any-of ir<%if.cond>
; CHECK-NEXT: EMIT vp<[[VP10]]> = select vp<[[VP9]]>, ir<%if.cond>, vp<[[VP4]]>
; CHECK-NEXT: EMIT vp<[[VP11]]> = select vp<[[VP9]]>, vp<[[VP8]]>, ir<%data.phi>
; CHECK-NEXT: EMIT vp<%index.next> = add nuw vp<[[VP3]]>, vp<[[VP1]]>
; CHECK-NEXT: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]>
; CHECK-NEXT: No successors
; CHECK-NEXT: }
; CHECK-NEXT: Successor(s): middle.block
; CHECK-EMPTY:
; CHECK-NEXT: middle.block:
; CHECK-NEXT: EMIT vp<[[VP13:%[0-9]+]]> = extract-last-active ir<%default_val>, vp<[[VP11]]>, vp<[[VP10]]>
; CHECK-NEXT: EMIT vp<%cmp.n> = icmp eq ir<%N>, vp<[[VP2]]>
; CHECK-NEXT: EMIT branch-on-cond vp<%cmp.n>
; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph
; CHECK-EMPTY:
; CHECK-NEXT: ir-bb<exit>:
; CHECK-NEXT: IR %select.data.lcssa = phi i32 [ %select.data, %latch ] (extra operand: vp<[[VP13]]> from middle.block)
; CHECK-NEXT: No successors
; CHECK-EMPTY:
; CHECK-NEXT: scalar.ph:
; CHECK-NEXT: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[VP2]]>, middle.block ], [ ir<0>, ir-bb<entry> ]
; CHECK-NEXT: EMIT-SCALAR vp<%bc.merge.rdx> = phi [ vp<[[VP13]]>, middle.block ], [ ir<%default_val>, ir-bb<entry> ]
; CHECK-NEXT: Successor(s): ir-bb<loop>
; CHECK-EMPTY:
; CHECK-NEXT: ir-bb<loop>:
; CHECK-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ] (extra operand: vp<%bc.resume.val> from scalar.ph)
; CHECK-NEXT: IR %data.phi = phi i32 [ %default_val, %entry ], [ %select.data, %latch ] (extra operand: vp<%bc.merge.rdx> from scalar.ph)
; CHECK-NEXT: IR %a.addr = getelementptr inbounds nuw i32, ptr %a, i64 %iv
; CHECK-NEXT: IR %ld.a = load i32, ptr %a.addr, align 4
; CHECK-NEXT: IR %if.cond = icmp sgt i32 %ld.a, %threshold
; CHECK-NEXT: No successors
; CHECK-NEXT: }
;
; CHECK-TF-LABEL: VPlan for loop in 'simple_csa_int_load'
; CHECK-TF: VPlan 'Initial VPlan for VF={4},UF>=1' {
; CHECK-TF-NEXT: Live-in vp<[[VP0:%[0-9]+]]> = VF
; CHECK-TF-NEXT: Live-in vp<[[VP1:%[0-9]+]]> = VF * UF
; CHECK-TF-NEXT: Live-in vp<[[VP2:%[0-9]+]]> = vector-trip-count
; CHECK-TF-NEXT: Live-in vp<[[VP3:%[0-9]+]]> = backedge-taken count
; CHECK-TF-NEXT: Live-in ir<%N> = original trip-count
; CHECK-TF-EMPTY:
; CHECK-TF-NEXT: ir-bb<entry>:
; CHECK-TF-NEXT: Successor(s): scalar.ph, vector.ph
; CHECK-TF-EMPTY:
; CHECK-TF-NEXT: vector.ph:
; CHECK-TF-NEXT: Successor(s): vector loop
; CHECK-TF-EMPTY:
; CHECK-TF-NEXT: <x1> vector loop: {
; CHECK-TF-NEXT: vector.body:
; CHECK-TF-NEXT: EMIT vp<[[VP4:%[0-9]+]]> = CANONICAL-INDUCTION ir<0>, vp<%index.next>
; CHECK-TF-NEXT: WIDEN-REDUCTION-PHI ir<%data.phi> = phi ir<%default_val>, vp<[[VP14:%[0-9]+]]>
; CHECK-TF-NEXT: WIDEN-PHI vp<[[VP5:%[0-9]+]]> = phi [ ir<false>, vector.ph ], [ vp<[[VP13:%[0-9]+]]>, vector.body ]
; CHECK-TF-NEXT: vp<[[VP6:%[0-9]+]]> = SCALAR-STEPS vp<[[VP4]]>, ir<1>, vp<[[VP0]]>
; CHECK-TF-NEXT: EMIT vp<[[VP7:%[0-9]+]]> = WIDEN-CANONICAL-INDUCTION vp<[[VP4]]>
; CHECK-TF-NEXT: EMIT vp<[[VP8:%[0-9]+]]> = icmp ule vp<[[VP7]]>, vp<[[VP3]]>
; CHECK-TF-NEXT: CLONE ir<%a.addr> = getelementptr inbounds nuw ir<%a>, vp<[[VP6]]>
; CHECK-TF-NEXT: vp<[[VP9:%[0-9]+]]> = vector-pointer inbounds nuw ir<%a.addr>
; CHECK-TF-NEXT: WIDEN ir<%ld.a> = load vp<[[VP9]]>, vp<[[VP8]]>
; CHECK-TF-NEXT: WIDEN ir<%if.cond> = icmp sgt ir<%ld.a>, ir<%threshold>
; CHECK-TF-NEXT: EMIT vp<[[VP10:%[0-9]+]]> = logical-and vp<[[VP8]]>, ir<%if.cond>
; CHECK-TF-NEXT: CLONE ir<%b.addr> = getelementptr ir<%b>, vp<[[VP6]]>
; CHECK-TF-NEXT: vp<[[VP11:%[0-9]+]]> = vector-pointer ir<%b.addr>
; CHECK-TF-NEXT: WIDEN ir<%ld.b> = load vp<[[VP11]]>, vp<[[VP10]]>
; CHECK-TF-NEXT: EMIT vp<[[VP12:%[0-9]+]]> = any-of vp<[[VP10]]>
; CHECK-TF-NEXT: EMIT vp<[[VP13]]> = select vp<[[VP12]]>, vp<[[VP10]]>, vp<[[VP5]]>
; CHECK-TF-NEXT: EMIT vp<[[VP14]]> = select vp<[[VP12]]>, ir<%ld.b>, ir<%data.phi>
; CHECK-TF-NEXT: EMIT vp<%index.next> = add vp<[[VP4]]>, vp<[[VP1]]>
; CHECK-TF-NEXT: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]>
; CHECK-TF-NEXT: No successors
; CHECK-TF-NEXT: }
; CHECK-TF-NEXT: Successor(s): middle.block
; CHECK-TF-EMPTY:
; CHECK-TF-NEXT: middle.block:
; CHECK-TF-NEXT: EMIT vp<[[VP16:%[0-9]+]]> = extract-last-active ir<%default_val>, vp<[[VP14]]>, vp<[[VP13]]>
; CHECK-TF-NEXT: Successor(s): ir-bb<exit>
; CHECK-TF-EMPTY:
; CHECK-TF-NEXT: ir-bb<exit>:
; CHECK-TF-NEXT: IR %select.data.lcssa = phi i32 [ %select.data, %latch ] (extra operand: vp<[[VP16]]> from middle.block)
; CHECK-TF-NEXT: No successors
; CHECK-TF-EMPTY:
; CHECK-TF-NEXT: scalar.ph:
; CHECK-TF-NEXT: EMIT-SCALAR vp<%bc.resume.val> = phi [ ir<0>, ir-bb<entry> ]
; CHECK-TF-NEXT: EMIT-SCALAR vp<%bc.merge.rdx> = phi [ ir<%default_val>, ir-bb<entry> ]
; CHECK-TF-NEXT: Successor(s): ir-bb<loop>
; CHECK-TF-EMPTY:
; CHECK-TF-NEXT: ir-bb<loop>:
; CHECK-TF-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ] (extra operand: vp<%bc.resume.val> from scalar.ph)
; CHECK-TF-NEXT: IR %data.phi = phi i32 [ %default_val, %entry ], [ %select.data, %latch ] (extra operand: vp<%bc.merge.rdx> from scalar.ph)
; CHECK-TF-NEXT: IR %a.addr = getelementptr inbounds nuw i32, ptr %a, i64 %iv
; CHECK-TF-NEXT: IR %ld.a = load i32, ptr %a.addr, align 4
; CHECK-TF-NEXT: IR %if.cond = icmp sgt i32 %ld.a, %threshold
; CHECK-TF-NEXT: No successors
; CHECK-TF-NEXT: }
;
entry:
br label %loop
loop:
%iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]
%data.phi = phi i32 [ %default_val, %entry ], [ %select.data, %latch ]
%a.addr = getelementptr inbounds nuw i32, ptr %a, i64 %iv
%ld.a = load i32, ptr %a.addr, align 4
%if.cond = icmp sgt i32 %ld.a, %threshold
br i1 %if.cond, label %if.then, label %latch
if.then:
%b.addr = getelementptr inbounds nuw i32, ptr %b, i64 %iv
%ld.b = load i32, ptr %b.addr, align 4
br label %latch
latch:
%select.data = phi i32 [ %ld.b, %if.then ], [ %data.phi, %loop ]
%iv.next = add nuw nsw i64 %iv, 1
%exit.cmp = icmp eq i64 %iv.next, %N
br i1 %exit.cmp, label %exit, label %loop
exit:
ret i32 %select.data
}
Reference in New Issue View Git Blame Copy Permalink