abdcde9bbc
Currently, SLP vectorizer do not care about loops and their trip count. It may lead to inefficient vectorization in some cases. Patch adds loop nest-aware tree building and cost estimation. When it comes to tree building, it now checks that tree do not span across different loop nests. The nodes from other loop nests are immediate buildvector nodes. The cost model adds the knowledge about loop trip count. If it is unknown, the default value is used, controlled by the -slp-cost-loop-min-trip-count=<value> option. The cost of the vector nodes in the loop is multiplied by the number of iteration (trip count), because each vector node will be executed the trip count number of times. This allows better cost estimation. Original Reviewers: jdenny-ornl, vporpo, hiraditya, RKSimon Original PR: https://github.com/llvm/llvm-project/pull/150450 Recommit after revert in c7bd3062f1dac975cf9b706f457b3c55b4bf57ff and in 4e500bd0015042b0cd4b7c87b81caeea06072d24 Reviewers: Pull Request: https://github.com/llvm/llvm-project/pull/187391
390 lines
18 KiB
LLVM
390 lines
18 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes=slp-vectorizer -slp-threshold=-2 -S -pass-remarks-output=%t < %s | FileCheck %s
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; RUN: cat %t | FileCheck -check-prefix=YAML %s
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; FIXME: The threshold is changed to keep this test case a bit smaller.
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; The AArch64 cost model should not give such high costs to select statements.
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--linux"
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; YAML: --- !Passed
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; YAML-NEXT: Pass: slp-vectorizer
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; YAML-NEXT: Name: VectorizedHorizontalReduction
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; YAML-NEXT: Function: test_select
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; YAML-NEXT: Args:
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; YAML-NEXT: - String: 'Vectorized horizontal reduction with cost '
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; YAML-NEXT: - Cost: '-38'
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; YAML-NEXT: - String: ' and with tree size '
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; YAML-NEXT: - TreeSize: '10'
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define i32 @test_select(ptr noalias nocapture readonly %blk1, ptr noalias nocapture readonly %blk2, i32 %lx, i32 %h) {
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; CHECK-LABEL: @test_select(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_22:%.*]] = icmp sgt i32 [[H:%.*]], 0
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; CHECK-NEXT: br i1 [[CMP_22]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]]
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; CHECK: for.body.lr.ph:
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; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[LX:%.*]] to i64
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[S_026:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[OP_RDX:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[J_025:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[P2_024:%.*]] = phi ptr [ [[BLK2:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR29:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[P1_023:%.*]] = phi ptr [ [[BLK1:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[P1_023]], align 4
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; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[P2_024]], align 4
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; CHECK-NEXT: [[TMP2:%.*]] = sub nsw <4 x i32> [[TMP0]], [[TMP1]]
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; CHECK-NEXT: [[TMP3:%.*]] = icmp slt <4 x i32> [[TMP2]], zeroinitializer
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; CHECK-NEXT: [[TMP4:%.*]] = sub nsw <4 x i32> zeroinitializer, [[TMP2]]
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; CHECK-NEXT: [[TMP5:%.*]] = select <4 x i1> [[TMP3]], <4 x i32> [[TMP4]], <4 x i32> [[TMP2]]
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; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP5]])
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; CHECK-NEXT: [[OP_RDX]] = add i32 [[TMP6]], [[S_026]]
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; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i32, ptr [[P1_023]], i64 [[IDX_EXT]]
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; CHECK-NEXT: [[ADD_PTR29]] = getelementptr inbounds i32, ptr [[P2_024]], i64 [[IDX_EXT]]
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; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[J_025]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], [[H]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END_LOOPEXIT:%.*]], label [[FOR_BODY]]
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; CHECK: for.end.loopexit:
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; CHECK-NEXT: br label [[FOR_END]]
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; CHECK: for.end:
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; CHECK-NEXT: [[S_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[OP_RDX]], [[FOR_END_LOOPEXIT]] ]
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; CHECK-NEXT: ret i32 [[S_0_LCSSA]]
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;
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entry:
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%cmp.22 = icmp sgt i32 %h, 0
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br i1 %cmp.22, label %for.body.lr.ph, label %for.end
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for.body.lr.ph: ; preds = %entry
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%idx.ext = sext i32 %lx to i64
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br label %for.body
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for.body: ; preds = %for.body, %for.body.lr.ph
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%s.026 = phi i32 [ 0, %for.body.lr.ph ], [ %add27, %for.body ]
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%j.025 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
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%p2.024 = phi ptr [ %blk2, %for.body.lr.ph ], [ %add.ptr29, %for.body ]
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%p1.023 = phi ptr [ %blk1, %for.body.lr.ph ], [ %add.ptr, %for.body ]
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%0 = load i32, ptr %p1.023, align 4
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%1 = load i32, ptr %p2.024, align 4
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%sub = sub nsw i32 %0, %1
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%cmp2 = icmp slt i32 %sub, 0
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%sub3 = sub nsw i32 0, %sub
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%sub3.sub = select i1 %cmp2, i32 %sub3, i32 %sub
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%add = add nsw i32 %sub3.sub, %s.026
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%arrayidx4 = getelementptr inbounds i32, ptr %p1.023, i64 1
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%2 = load i32, ptr %arrayidx4, align 4
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%arrayidx5 = getelementptr inbounds i32, ptr %p2.024, i64 1
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%3 = load i32, ptr %arrayidx5, align 4
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%sub6 = sub nsw i32 %2, %3
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%cmp7 = icmp slt i32 %sub6, 0
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%sub9 = sub nsw i32 0, %sub6
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%v.1 = select i1 %cmp7, i32 %sub9, i32 %sub6
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%add11 = add nsw i32 %add, %v.1
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%arrayidx12 = getelementptr inbounds i32, ptr %p1.023, i64 2
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%4 = load i32, ptr %arrayidx12, align 4
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%arrayidx13 = getelementptr inbounds i32, ptr %p2.024, i64 2
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%5 = load i32, ptr %arrayidx13, align 4
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%sub14 = sub nsw i32 %4, %5
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%cmp15 = icmp slt i32 %sub14, 0
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%sub17 = sub nsw i32 0, %sub14
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%sub17.sub14 = select i1 %cmp15, i32 %sub17, i32 %sub14
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%add19 = add nsw i32 %add11, %sub17.sub14
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%arrayidx20 = getelementptr inbounds i32, ptr %p1.023, i64 3
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%6 = load i32, ptr %arrayidx20, align 4
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%arrayidx21 = getelementptr inbounds i32, ptr %p2.024, i64 3
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%7 = load i32, ptr %arrayidx21, align 4
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%sub22 = sub nsw i32 %6, %7
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%cmp23 = icmp slt i32 %sub22, 0
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%sub25 = sub nsw i32 0, %sub22
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%v.3 = select i1 %cmp23, i32 %sub25, i32 %sub22
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%add27 = add nsw i32 %add19, %v.3
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%add.ptr = getelementptr inbounds i32, ptr %p1.023, i64 %idx.ext
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%add.ptr29 = getelementptr inbounds i32, ptr %p2.024, i64 %idx.ext
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%inc = add nuw nsw i32 %j.025, 1
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%exitcond = icmp eq i32 %inc, %h
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br i1 %exitcond, label %for.end.loopexit, label %for.body
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for.end.loopexit: ; preds = %for.body
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br label %for.end
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for.end: ; preds = %for.end.loopexit, %entry
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%s.0.lcssa = phi i32 [ 0, %entry ], [ %add27, %for.end.loopexit ]
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ret i32 %s.0.lcssa
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}
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;; Check whether SLP can find a reduction phi whose incoming blocks are not
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;; the same as the block containing the phi.
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;;
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;; Came from code like,
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;;
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;; int s = 0;
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;; for (int j = 0; j < h; j++) {
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;; s += p1ptr p2[0]
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;; s += p1ptr p2[1];
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;; s += p1ptr p2[2];
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;; s += p1ptr p2[3];
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;; if (s >= lim)
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;; break;
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;; p1 += lx;
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;; p2 += lx;
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;; }
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define i32 @reduction_with_br(ptr noalias nocapture readonly %blk1, ptr noalias nocapture readonly %blk2, i32 %lx, i32 %h, i32 %lim) {
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; YAML: --- !Passed
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; YAML-NEXT: Pass: slp-vectorizer
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; YAML-NEXT: Name: VectorizedHorizontalReduction
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; YAML-NEXT: Function: reduction_with_br
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; YAML-NEXT: Args:
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; YAML-NEXT: - String: 'Vectorized horizontal reduction with cost '
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; YAML-NEXT: - Cost: '-20'
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; YAML-NEXT: - String: ' and with tree size '
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; YAML-NEXT: - TreeSize: '3'
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; CHECK-LABEL: @reduction_with_br(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_16:%.*]] = icmp sgt i32 [[H:%.*]], 0
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; CHECK-NEXT: br i1 [[CMP_16]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]]
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; CHECK: for.body.lr.ph:
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; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[LX:%.*]] to i64
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[S_020:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[OP_RDX:%.*]], [[IF_END:%.*]] ]
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; CHECK-NEXT: [[J_019:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[IF_END]] ]
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; CHECK-NEXT: [[P2_018:%.*]] = phi ptr [ [[BLK2:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR16:%.*]], [[IF_END]] ]
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; CHECK-NEXT: [[P1_017:%.*]] = phi ptr [ [[BLK1:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR:%.*]], [[IF_END]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[P1_017]], align 4
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; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[P2_018]], align 4
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; CHECK-NEXT: [[TMP2:%.*]] = mul nsw <4 x i32> [[TMP1]], [[TMP0]]
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; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP2]])
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; CHECK-NEXT: [[OP_RDX]] = add i32 [[TMP3]], [[S_020]]
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; CHECK-NEXT: [[CMP14:%.*]] = icmp slt i32 [[OP_RDX]], [[LIM:%.*]]
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; CHECK-NEXT: br i1 [[CMP14]], label [[IF_END]], label [[FOR_END_LOOPEXIT:%.*]]
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; CHECK: if.end:
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; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i32, ptr [[P1_017]], i64 [[IDX_EXT]]
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; CHECK-NEXT: [[ADD_PTR16]] = getelementptr inbounds i32, ptr [[P2_018]], i64 [[IDX_EXT]]
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; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[J_019]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[INC]], [[H]]
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT]]
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; CHECK: for.end.loopexit:
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; CHECK-NEXT: br label [[FOR_END]]
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; CHECK: for.end:
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; CHECK-NEXT: [[S_1:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[OP_RDX]], [[FOR_END_LOOPEXIT]] ]
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; CHECK-NEXT: ret i32 [[S_1]]
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;
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entry:
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%cmp.16 = icmp sgt i32 %h, 0
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br i1 %cmp.16, label %for.body.lr.ph, label %for.end
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for.body.lr.ph: ; preds = %entry
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%idx.ext = sext i32 %lx to i64
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br label %for.body
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for.body: ; preds = %for.body.lr.ph, %if.end
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%s.020 = phi i32 [ 0, %for.body.lr.ph ], [ %add13, %if.end ]
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%j.019 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %if.end ]
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%p2.018 = phi ptr [ %blk2, %for.body.lr.ph ], [ %add.ptr16, %if.end ]
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%p1.017 = phi ptr [ %blk1, %for.body.lr.ph ], [ %add.ptr, %if.end ]
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%0 = load i32, ptr %p1.017, align 4
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%1 = load i32, ptr %p2.018, align 4
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%mul = mul nsw i32 %1, %0
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%add = add nsw i32 %mul, %s.020
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%arrayidx2 = getelementptr inbounds i32, ptr %p1.017, i64 1
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%2 = load i32, ptr %arrayidx2, align 4
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%arrayidx3 = getelementptr inbounds i32, ptr %p2.018, i64 1
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%3 = load i32, ptr %arrayidx3, align 4
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%mul4 = mul nsw i32 %3, %2
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%add5 = add nsw i32 %add, %mul4
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%arrayidx6 = getelementptr inbounds i32, ptr %p1.017, i64 2
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%4 = load i32, ptr %arrayidx6, align 4
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%arrayidx7 = getelementptr inbounds i32, ptr %p2.018, i64 2
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%5 = load i32, ptr %arrayidx7, align 4
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%mul8 = mul nsw i32 %5, %4
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%add9 = add nsw i32 %add5, %mul8
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%arrayidx10 = getelementptr inbounds i32, ptr %p1.017, i64 3
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%6 = load i32, ptr %arrayidx10, align 4
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%arrayidx11 = getelementptr inbounds i32, ptr %p2.018, i64 3
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%7 = load i32, ptr %arrayidx11, align 4
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%mul12 = mul nsw i32 %7, %6
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%add13 = add nsw i32 %add9, %mul12
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%cmp14 = icmp slt i32 %add13, %lim
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br i1 %cmp14, label %if.end, label %for.end.loopexit
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if.end: ; preds = %for.body
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%add.ptr = getelementptr inbounds i32, ptr %p1.017, i64 %idx.ext
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%add.ptr16 = getelementptr inbounds i32, ptr %p2.018, i64 %idx.ext
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%inc = add nuw nsw i32 %j.019, 1
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%cmp = icmp slt i32 %inc, %h
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br i1 %cmp, label %for.body, label %for.end.loopexit
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for.end.loopexit: ; preds = %for.body, %if.end
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br label %for.end
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for.end: ; preds = %for.end.loopexit, %entry
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%s.1 = phi i32 [ 0, %entry ], [ %add13, %for.end.loopexit ]
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ret i32 %s.1
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}
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; YAML: --- !Passed
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; YAML-NEXT: Pass: slp-vectorizer
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; YAML-NEXT: Name: VectorizedHorizontalReduction
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; YAML-NEXT: Function: test_unrolled_select
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; YAML-NEXT: Args:
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; YAML-NEXT: - String: 'Vectorized horizontal reduction with cost '
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; YAML-NEXT: - Cost: '-88'
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; YAML-NEXT: - String: ' and with tree size '
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; YAML-NEXT: - TreeSize: '12'
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define i32 @test_unrolled_select(ptr noalias nocapture readonly %blk1, ptr noalias nocapture readonly %blk2, i32 %lx, i32 %h, i32 %lim) #0 {
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; CHECK-LABEL: @test_unrolled_select(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_43:%.*]] = icmp sgt i32 [[H:%.*]], 0
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; CHECK-NEXT: br i1 [[CMP_43]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]]
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; CHECK: for.body.lr.ph:
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; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[LX:%.*]] to i64
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[S_047:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[OP_RDX:%.*]], [[IF_END_86:%.*]] ]
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; CHECK-NEXT: [[J_046:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[IF_END_86]] ]
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; CHECK-NEXT: [[P2_045:%.*]] = phi ptr [ [[BLK2:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR88:%.*]], [[IF_END_86]] ]
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; CHECK-NEXT: [[P1_044:%.*]] = phi ptr [ [[BLK1:%.*]], [[FOR_BODY_LR_PH]] ], [ [[ADD_PTR:%.*]], [[IF_END_86]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i8>, ptr [[P1_044]], align 1
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; CHECK-NEXT: [[TMP1:%.*]] = zext <8 x i8> [[TMP0]] to <8 x i16>
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; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i8>, ptr [[P2_045]], align 1
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; CHECK-NEXT: [[TMP3:%.*]] = zext <8 x i8> [[TMP2]] to <8 x i16>
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; CHECK-NEXT: [[TMP4:%.*]] = sub <8 x i16> [[TMP1]], [[TMP3]]
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; CHECK-NEXT: [[TMP6:%.*]] = icmp slt <8 x i16> [[TMP4]], zeroinitializer
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; CHECK-NEXT: [[TMP7:%.*]] = sub <8 x i16> zeroinitializer, [[TMP4]]
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; CHECK-NEXT: [[TMP8:%.*]] = select <8 x i1> [[TMP6]], <8 x i16> [[TMP7]], <8 x i16> [[TMP4]]
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; CHECK-NEXT: [[TMP9:%.*]] = sext <8 x i16> [[TMP8]] to <8 x i32>
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; CHECK-NEXT: [[TMP10:%.*]] = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> [[TMP9]])
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; CHECK-NEXT: [[OP_RDX]] = add i32 [[TMP10]], [[S_047]]
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; CHECK-NEXT: [[CMP83:%.*]] = icmp slt i32 [[OP_RDX]], [[LIM:%.*]]
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; CHECK-NEXT: br i1 [[CMP83]], label [[IF_END_86]], label [[FOR_END_LOOPEXIT:%.*]]
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; CHECK: if.end.86:
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; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr [[P1_044]], i64 [[IDX_EXT]]
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; CHECK-NEXT: [[ADD_PTR88]] = getelementptr inbounds i8, ptr [[P2_045]], i64 [[IDX_EXT]]
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; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[J_046]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[INC]], [[H]]
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT]]
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; CHECK: for.end.loopexit:
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; CHECK-NEXT: br label [[FOR_END]]
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; CHECK: for.end:
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; CHECK-NEXT: [[S_1:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[OP_RDX]], [[FOR_END_LOOPEXIT]] ]
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; CHECK-NEXT: ret i32 [[S_1]]
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;
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entry:
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%cmp.43 = icmp sgt i32 %h, 0
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br i1 %cmp.43, label %for.body.lr.ph, label %for.end
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for.body.lr.ph: ; preds = %entry
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%idx.ext = sext i32 %lx to i64
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br label %for.body
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for.body: ; preds = %for.body.lr.ph, %if.end.86
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%s.047 = phi i32 [ 0, %for.body.lr.ph ], [ %add82, %if.end.86 ]
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%j.046 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %if.end.86 ]
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%p2.045 = phi ptr [ %blk2, %for.body.lr.ph ], [ %add.ptr88, %if.end.86 ]
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%p1.044 = phi ptr [ %blk1, %for.body.lr.ph ], [ %add.ptr, %if.end.86 ]
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%0 = load i8, ptr %p1.044, align 1
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%conv = zext i8 %0 to i32
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%1 = load i8, ptr %p2.045, align 1
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%conv2 = zext i8 %1 to i32
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%sub = sub nsw i32 %conv, %conv2
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%cmp3 = icmp slt i32 %sub, 0
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%sub5 = sub nsw i32 0, %sub
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|
%sub5.sub = select i1 %cmp3, i32 %sub5, i32 %sub
|
|
%add = add nsw i32 %sub5.sub, %s.047
|
|
%arrayidx6 = getelementptr inbounds i8, ptr %p1.044, i64 1
|
|
%2 = load i8, ptr %arrayidx6, align 1
|
|
%conv7 = zext i8 %2 to i32
|
|
%arrayidx8 = getelementptr inbounds i8, ptr %p2.045, i64 1
|
|
%3 = load i8, ptr %arrayidx8, align 1
|
|
%conv9 = zext i8 %3 to i32
|
|
%sub10 = sub nsw i32 %conv7, %conv9
|
|
%cmp11 = icmp slt i32 %sub10, 0
|
|
%sub14 = sub nsw i32 0, %sub10
|
|
%v.1 = select i1 %cmp11, i32 %sub14, i32 %sub10
|
|
%add16 = add nsw i32 %add, %v.1
|
|
%arrayidx17 = getelementptr inbounds i8, ptr %p1.044, i64 2
|
|
%4 = load i8, ptr %arrayidx17, align 1
|
|
%conv18 = zext i8 %4 to i32
|
|
%arrayidx19 = getelementptr inbounds i8, ptr %p2.045, i64 2
|
|
%5 = load i8, ptr %arrayidx19, align 1
|
|
%conv20 = zext i8 %5 to i32
|
|
%sub21 = sub nsw i32 %conv18, %conv20
|
|
%cmp22 = icmp slt i32 %sub21, 0
|
|
%sub25 = sub nsw i32 0, %sub21
|
|
%sub25.sub21 = select i1 %cmp22, i32 %sub25, i32 %sub21
|
|
%add27 = add nsw i32 %add16, %sub25.sub21
|
|
%arrayidx28 = getelementptr inbounds i8, ptr %p1.044, i64 3
|
|
%6 = load i8, ptr %arrayidx28, align 1
|
|
%conv29 = zext i8 %6 to i32
|
|
%arrayidx30 = getelementptr inbounds i8, ptr %p2.045, i64 3
|
|
%7 = load i8, ptr %arrayidx30, align 1
|
|
%conv31 = zext i8 %7 to i32
|
|
%sub32 = sub nsw i32 %conv29, %conv31
|
|
%cmp33 = icmp slt i32 %sub32, 0
|
|
%sub36 = sub nsw i32 0, %sub32
|
|
%v.3 = select i1 %cmp33, i32 %sub36, i32 %sub32
|
|
%add38 = add nsw i32 %add27, %v.3
|
|
%arrayidx39 = getelementptr inbounds i8, ptr %p1.044, i64 4
|
|
%8 = load i8, ptr %arrayidx39, align 1
|
|
%conv40 = zext i8 %8 to i32
|
|
%arrayidx41 = getelementptr inbounds i8, ptr %p2.045, i64 4
|
|
%9 = load i8, ptr %arrayidx41, align 1
|
|
%conv42 = zext i8 %9 to i32
|
|
%sub43 = sub nsw i32 %conv40, %conv42
|
|
%cmp44 = icmp slt i32 %sub43, 0
|
|
%sub47 = sub nsw i32 0, %sub43
|
|
%sub47.sub43 = select i1 %cmp44, i32 %sub47, i32 %sub43
|
|
%add49 = add nsw i32 %add38, %sub47.sub43
|
|
%arrayidx50 = getelementptr inbounds i8, ptr %p1.044, i64 5
|
|
%10 = load i8, ptr %arrayidx50, align 1
|
|
%conv51 = zext i8 %10 to i32
|
|
%arrayidx52 = getelementptr inbounds i8, ptr %p2.045, i64 5
|
|
%11 = load i8, ptr %arrayidx52, align 1
|
|
%conv53 = zext i8 %11 to i32
|
|
%sub54 = sub nsw i32 %conv51, %conv53
|
|
%cmp55 = icmp slt i32 %sub54, 0
|
|
%sub58 = sub nsw i32 0, %sub54
|
|
%v.5 = select i1 %cmp55, i32 %sub58, i32 %sub54
|
|
%add60 = add nsw i32 %add49, %v.5
|
|
%arrayidx61 = getelementptr inbounds i8, ptr %p1.044, i64 6
|
|
%12 = load i8, ptr %arrayidx61, align 1
|
|
%conv62 = zext i8 %12 to i32
|
|
%arrayidx63 = getelementptr inbounds i8, ptr %p2.045, i64 6
|
|
%13 = load i8, ptr %arrayidx63, align 1
|
|
%conv64 = zext i8 %13 to i32
|
|
%sub65 = sub nsw i32 %conv62, %conv64
|
|
%cmp66 = icmp slt i32 %sub65, 0
|
|
%sub69 = sub nsw i32 0, %sub65
|
|
%sub69.sub65 = select i1 %cmp66, i32 %sub69, i32 %sub65
|
|
%add71 = add nsw i32 %add60, %sub69.sub65
|
|
%arrayidx72 = getelementptr inbounds i8, ptr %p1.044, i64 7
|
|
%14 = load i8, ptr %arrayidx72, align 1
|
|
%conv73 = zext i8 %14 to i32
|
|
%arrayidx74 = getelementptr inbounds i8, ptr %p2.045, i64 7
|
|
%15 = load i8, ptr %arrayidx74, align 1
|
|
%conv75 = zext i8 %15 to i32
|
|
%sub76 = sub nsw i32 %conv73, %conv75
|
|
%cmp77 = icmp slt i32 %sub76, 0
|
|
%sub80 = sub nsw i32 0, %sub76
|
|
%v.7 = select i1 %cmp77, i32 %sub80, i32 %sub76
|
|
%add82 = add nsw i32 %add71, %v.7
|
|
%cmp83 = icmp slt i32 %add82, %lim
|
|
br i1 %cmp83, label %if.end.86, label %for.end.loopexit
|
|
|
|
if.end.86: ; preds = %for.body
|
|
%add.ptr = getelementptr inbounds i8, ptr %p1.044, i64 %idx.ext
|
|
%add.ptr88 = getelementptr inbounds i8, ptr %p2.045, i64 %idx.ext
|
|
%inc = add nuw nsw i32 %j.046, 1
|
|
%cmp = icmp slt i32 %inc, %h
|
|
br i1 %cmp, label %for.body, label %for.end.loopexit
|
|
|
|
for.end.loopexit: ; preds = %for.body, %if.end.86
|
|
br label %for.end
|
|
|
|
for.end: ; preds = %for.end.loopexit, %entry
|
|
%s.1 = phi i32 [ 0, %entry ], [ %add82, %for.end.loopexit ]
|
|
ret i32 %s.1
|
|
}
|
|
|