Graham Hunter f737df73a3

[AArch64][CostModel] Increase the cost of illegal SVE int-to-fp converts (#130756) ...

If a scalable vector uitofp or sitofp effectively extends the size of
each element as part of the conversion, the AArch64 backend
may need to plant multiple unpacks before converting. Increase
the cost in those cases to account for this.

2025-03-25 10:43:44 +00:00

..

AsmParser

[Target] Use *Set::insert_range (NFC) (#132879)

2025-03-24 22:42:04 -07:00

Disassembler

[MC] Return MCRegister from MCRegisterClass::getRegister. NFC (#132126)

2025-03-20 07:24:53 -07:00

GISel

[AArch64][GlobalISel] Legalize more CTPOP vector types. (#131513)

2025-03-20 07:21:01 +00:00

MCTargetDesc

MCValue: Simplify code with getSubSym

2025-03-24 21:52:40 -07:00

TargetInfo

…

Utils

[AArch64][SME2] Don't preserve ZT0 around SME ABI routines (#132722)

2025-03-25 10:09:25 +00:00

AArch64.h

[MTE] Apply alignment / size in AsmPrinter rather than IR (#111918)

2024-12-17 00:47:02 -08:00

AArch64.td

[NFC][AArch64] Adjust predicate names to be more consistent (#123172)

2025-01-16 19:36:28 +00:00

AArch64A53Fix835769.cpp

[AArch64] Remove unused includes (NFC) (#115685)

2024-11-11 07:35:08 -08:00

AArch64A57FPLoadBalancing.cpp

…

AArch64AdvSIMDScalarPass.cpp

Revert "[CodeGen] Remove static member function Register::isVirtualRegister. NFC (#127968)"

2025-02-20 22:06:21 +00:00

AArch64Arm64ECCallLowering.cpp

[IR] Store Triple in Module (NFC) (#129868)

2025-03-06 10:27:47 +01:00

AArch64AsmPrinter.cpp

[MC] Return MCRegister from MCRegisterClass::getRegister. NFC (#132126)

2025-03-20 07:24:53 -07:00

AArch64BranchTargets.cpp

[Target] Use *Set::insert_range (NFC) (#132879)

2025-03-24 22:42:04 -07:00

AArch64CallingConvention.cpp

[AArch64] Do not split bfloat HFA args between regs and stack (#128909)

2025-02-27 11:38:41 +00:00

AArch64CallingConvention.h

…

AArch64CallingConvention.td

[AArch64] Basic SVE PCS support for handling scalable vectors on Darwin.

2024-08-20 17:10:51 -07:00

AArch64CleanupLocalDynamicTLSPass.cpp

[aarch64][win] Update Called Globals info when updating Call Site info (#122762)

2025-01-13 14:00:31 -08:00

AArch64CollectLOH.cpp

[CodeGen] Use MCRegister instead of MCPhysReg in RegisterMaskPair. NFC (#123688)

2025-01-21 07:04:35 -08:00

AArch64Combine.td

[AArch64][GlobalISel] Full reverse shuffles. (#119083)

2024-12-29 15:56:12 +00:00

AArch64CompressJumpTables.cpp

[AArch64] Remove unused includes (NFC) (#115685)

2024-11-11 07:35:08 -08:00

AArch64CondBrTuning.cpp

[InstrRef] Preserve debug instr num in aarch64-cond-br-tuning. (#132081)

2025-03-20 23:06:10 -07:00

AArch64ConditionalCompares.cpp

Revert "[CodeGen] Remove static member function Register::isVirtualRegister. NFC (#127968)"

2025-02-20 22:06:21 +00:00

AArch64ConditionOptimizer.cpp

…

AArch64DeadRegisterDefinitionsPass.cpp

[AArch64] Remove unused includes (NFC) (#115685)

2024-11-11 07:35:08 -08:00

AArch64ExpandImm.cpp

…

AArch64ExpandImm.h

…

AArch64ExpandPseudoInsts.cpp

[InstrRef] Preserve debug instr num in aarch64-expand-pseudo LOADgot expansion (#128081)

2025-02-24 21:42:02 -08:00

AArch64FalkorHWPFFix.cpp

…

AArch64FastISel.cpp

[AArch64] Avoid repeated hash lookups (NFC) (#130542)

2025-03-09 23:15:22 -07:00

AArch64Features.td

[AArch64] Add support for SHF_AARCH64_PURECODE ELF section flag (1/3) (#125687)

2025-02-14 08:56:07 +00:00

AArch64FMV.td

[FMV][AArch64] Remove features predres and ls64. (#124266)

2025-01-24 17:22:27 +00:00

AArch64FrameLowering.cpp

[FrameLowering] Use MCRegister instead of Register in CalleeSavedInfo. NFC (#128095)

2025-02-20 23:44:05 -08:00

AArch64FrameLowering.h

[CFIFixup] Fixup CFI for split functions with synchronous uwtables (#125299)

2025-02-11 18:25:08 -05:00

AArch64GenRegisterBankInfo.def

[GlobalISel][AArch64] Legalize G_ADD, G_SUB, G_AND, G_OR, and G_XOR for SVE (#110561)

2024-10-27 23:14:07 +01:00

AArch64InstrAtomics.td

[AArch64] Codegen for 16/32/64-bit floating-point atomicrmw ops (#125686)

2025-03-07 11:22:33 +00:00

AArch64InstrFormats.td

[AArch64] Codegen for 16/32/64-bit floating-point atomicrmw ops (#125686)

2025-03-07 11:22:33 +00:00

AArch64InstrGISel.td

…

AArch64InstrInfo.cpp

Revert "[AArch64][MachineCombiner] Recombine long chains of accumulation instructions into a tree to increase ILP (#126060) (#132607)

2025-03-23 13:58:00 +02:00

AArch64InstrInfo.h

Revert "[AArch64][MachineCombiner] Recombine long chains of accumulation instructions into a tree to increase ILP (#126060) (#132607)

2025-03-23 13:58:00 +02:00

AArch64InstrInfo.td

[GlobalISel] Add and use a m_GAddLike pattern matcher. NFC (#125435)

2025-03-10 22:03:36 +00:00

AArch64ISelDAGToDAG.cpp

Reapply "[AArch64][SVE] Improve fixed-length addressing modes. (#129732)" (#130625)

2025-03-19 08:25:37 +00:00

AArch64ISelLowering.cpp

Reapply "[Aarch64] [ISel] Don't save vaargs registers if vaargs are unused" (#131459)

2025-03-24 18:13:42 +03:00

AArch64ISelLowering.h

[CodeGen][GlobalISel] Add a getVectorIdxWidth and getVectorIdxLLT. (#131526)

2025-03-18 08:31:11 +00:00

AArch64LoadStoreOptimizer.cpp

[AArch64] Fix LDR/STR folding causing memtag failures (#118821)

2024-12-06 13:07:37 +00:00

AArch64LowerHomogeneousPrologEpilog.cpp

[NFC]Make file-local cl::opt global variables static (#126486)

2025-03-03 13:46:33 +07:00

AArch64MachineFunctionInfo.cpp

[IR] Store Triple in Module (NFC) (#129868)

2025-03-06 10:27:47 +01:00

AArch64MachineFunctionInfo.h

[Target] Use *Set::insert_range (NFC) (#132140)

2025-03-20 09:09:30 -07:00

AArch64MachineScheduler.cpp

…

AArch64MachineScheduler.h

…

AArch64MacroFusion.cpp

…

AArch64MacroFusion.h

[CodeGen] Move MISched target hooks into TargetMachine (#125700)

2025-02-05 11:41:37 +05:30

AArch64MCInstLower.cpp

[MC] Remove unneeded VK_None argument from MCSymbolRefExpr::create. NFC

2025-03-05 23:14:04 -08:00

AArch64MCInstLower.h

…

AArch64MIPeepholeOpt.cpp

Fix typo "intead"

2024-11-21 14:48:38 +00:00

AArch64PBQPRegAlloc.cpp

Revert "[CodeGen] Remove static member function Register::isPhysicalRegister. NFC"

2025-02-20 22:06:21 +00:00

AArch64PBQPRegAlloc.h

…

AArch64PerfectShuffle.h

…

AArch64PfmCounters.td

…

AArch64PointerAuth.cpp

[AArch64] Correct position of CFI Instruction for Pointer Authentication (#121559)

2025-01-06 09:39:50 +00:00

AArch64PointerAuth.h

[AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (#110705)

2024-11-12 18:27:19 +03:00

AArch64PostCoalescerPass.cpp

[AArch64] Remove unused includes (NFC) (#115685)

2024-11-11 07:35:08 -08:00

AArch64Processors.td

[AArch64] Add initial support for -mcpu=olympus. (#132368)

2025-03-25 08:09:04 +00:00

AArch64PromoteConstant.cpp

[AArch64] Remove unused includes (NFC) (#115685)

2024-11-11 07:35:08 -08:00

AArch64RedundantCopyElimination.cpp

…

AArch64RegisterBanks.td

…

AArch64RegisterInfo.cpp

[FrameLowering] Use MCRegister instead of Register in CalleeSavedInfo. NFC (#128095)

2025-02-20 23:44:05 -08:00

AArch64RegisterInfo.h

[FrameLowering] Use MCRegister instead of Register in CalleeSavedInfo. NFC (#128095)

2025-02-20 23:44:05 -08:00

AArch64RegisterInfo.td

[AArch64][SME] Spill p-regs as z-regs when streaming hazards are possible (#123752)

2025-02-03 12:04:46 +00:00

AArch64SchedA53.td

…

AArch64SchedA55.td

…

AArch64SchedA57.td

…

AArch64SchedA57WriteRes.td

…

AArch64SchedA64FX.td

…

AArch64SchedA510.td

…

AArch64SchedAmpere1.td

…

AArch64SchedAmpere1B.td

…

AArch64SchedCyclone.td

…

AArch64SchedExynosM3.td

…

AArch64SchedExynosM4.td

…

AArch64SchedExynosM5.td

…

AArch64SchedFalkor.td

…

AArch64SchedFalkorDetails.td

…

AArch64SchedKryo.td

…

AArch64SchedKryoDetails.td

…

AArch64SchedNeoverseN1.td

…

AArch64SchedNeoverseN2.td

[AArch64][machine-scheduler][Neoverse-N2] fdiv is blocking (#119206)

2025-01-06 21:57:15 +00:00

AArch64SchedNeoverseN3.td

[AArch64] Initial sched model for Neoverse N3 (#106371)

2024-09-19 19:22:24 +01:00

AArch64SchedNeoverseV1.td

[AArch64] Fix scheduling information for arithmetic and logical instructions. (#113542)

2024-12-04 09:30:44 +00:00

AArch64SchedNeoverseV2.td

[AArch64] Fix scheduling information for arithmetic and logical instructions. (#113542)

2024-12-04 09:30:44 +00:00

AArch64SchedOryon.td

…

AArch64SchedPredExynos.td

…

AArch64SchedPredicates.td

…

AArch64SchedPredNeoverse.td

…

AArch64SchedThunderX2T99.td

…

AArch64SchedThunderX3T110.td

…

AArch64SchedThunderX.td

…

AArch64SchedTSV110.td

…

AArch64Schedule.td

…

AArch64SelectionDAGInfo.cpp

[SelectionDAG] Virtualize isTargetStrictFPOpcode / isTargetMemoryOpcode (#119969)

2024-12-21 05:29:51 +03:00

AArch64SelectionDAGInfo.h

[SelectionDAG] Virtualize isTargetStrictFPOpcode / isTargetMemoryOpcode (#119969)

2024-12-21 05:29:51 +03:00

AArch64SIMDInstrOpt.cpp

…

AArch64SLSHardening.cpp

[aarch64][win] Update Called Globals info when updating Call Site info (#122762)

2025-01-13 14:00:31 -08:00

AArch64SMEInstrInfo.td

[NFC][AArch64] Adjust predicate names to be more consistent (#123172)

2025-01-16 19:36:28 +00:00

AArch64SpeculationHardening.cpp

[AArch64] Remove unused includes (NFC) (#115685)

2024-11-11 07:35:08 -08:00

AArch64StackTagging.cpp

[IR] Store Triple in Module (NFC) (#129868)

2025-03-06 10:27:47 +01:00

AArch64StackTaggingPreRA.cpp

[NFC]Make file-local cl::opt global variables static (#126486)

2025-03-03 13:46:33 +07:00

AArch64StorePairSuppress.cpp

[CodeGen][NewPM] Port machine trace metrics analysis to new pass manager. (#108507)

2024-10-16 13:19:55 +05:30

AArch64Subtarget.cpp

[AArch64] Add initial support for -mcpu=olympus. (#132368)

2025-03-25 08:09:04 +00:00

AArch64Subtarget.h

Reapply "[AArch64][SVE] Improve fixed-length addressing modes. (#129732)" (#130625)

2025-03-19 08:25:37 +00:00

AArch64SVEInstrInfo.td

[LLVM][SVE] Lower bfloat extends the same as other types. (#129544)

2025-03-04 11:53:43 +00:00

AArch64SystemOperands.td

[AArch64] Add DC CIGDPAPA and DC CIPAPA instructions (#122718)

2025-01-14 08:35:36 +00:00

AArch64TargetMachine.cpp

Initialize aarch64-cond-br-tuning pass (#132087)

2025-03-20 14:48:53 -07:00

AArch64TargetMachine.h

Revert "Reland "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128…" (#128819)

2025-02-26 10:54:39 +05:30

AArch64TargetObjectFile.cpp

[AArch64] Always add PURECODE flag to empty .text if "+execute-only" is set (#132196)

2025-03-24 11:19:26 +01:00

AArch64TargetObjectFile.h

[CodeGen] Rename PLTRelativeVariantKind. NFC

2025-03-21 23:02:08 -07:00

AArch64TargetTransformInfo.cpp

[AArch64][CostModel] Increase the cost of illegal SVE int-to-fp converts (#130756)

2025-03-25 10:43:44 +00:00

AArch64TargetTransformInfo.h

[TTI] Align optional FMFs in getExtendedReductionCost() to getArithmeticReductionCost(). (#131968)

2025-03-19 18:53:38 +08:00

CMakeLists.txt

Revert "Reland "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128…" (#128819)

2025-02-26 10:54:39 +05:30

SMEABIPass.cpp

[AArch64] Remove unused includes (NFC) (#115685)

2024-11-11 07:35:08 -08:00

SMEInstrFormats.td

[AArch64][SME] Extend FORM_TRANSPOSED pseudos to all multi-vector intrinsics (#124258)

2025-02-04 16:28:06 +00:00

SMEPeepholeOpt.cpp

[AArch64][SME] Extend FORM_TRANSPOSED pseudos to all multi-vector intrinsics (#124258)

2025-02-04 16:28:06 +00:00

SVEInstrFormats.td

[LLVM][SVE] Implement isel for bfloat fptoi and itofp operations. (#129713)

2025-03-19 11:51:42 +00:00

SVEIntrinsicOpts.cpp

[AArch64] Remove unused includes (NFC) (#115685)

2024-11-11 07:35:08 -08:00