979c275097
The module currently stores the target triple as a string. This means that any code that wants to actually use the triple first has to instantiate a Triple, which is somewhat expensive. The change in #121652 caused a moderate compile-time regression due to this. While it would be easy enough to work around, I think that architecturally, it makes more sense to store the parsed Triple in the module, so that it can always be directly queried. For this change, I've opted not to add any magic conversions between std::string and Triple for backwards-compatibilty purses, and instead write out needed Triple()s or str()s explicitly. This is because I think a decent number of them should be changed to work on Triple as well, to avoid unnecessary conversions back and forth. The only interesting part in this patch is that the default triple is Triple("") instead of Triple() to preserve existing behavior. The former defaults to using the ELF object format instead of unknown object format. We should fix that as well.
245 lines
9.2 KiB
C++
245 lines
9.2 KiB
C++
#include "ARMInstrInfo.h"
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#include "ARMSubtarget.h"
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#include "ARMTargetMachine.h"
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#include "llvm/CodeGen/MIRParser/MIRParser.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/IR/Module.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Support/MemoryBuffer.h"
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#include "llvm/Support/TargetSelect.h"
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#include "gtest/gtest.h"
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using namespace llvm;
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namespace {
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/// The \p InputIRSnippet is only needed for things that can't be expressed in
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/// the \p InputMIRSnippet (global variables etc)
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/// TODO: Some of this might be useful for other architectures as well - extract
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/// the platform-independent parts somewhere they can be reused.
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void runChecks(
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TargetMachine *TM, const ARMBaseInstrInfo *II,
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const StringRef InputIRSnippet, const StringRef InputMIRSnippet,
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unsigned Expected,
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std::function<void(const ARMBaseInstrInfo &, MachineFunction &, unsigned &)>
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Checks) {
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LLVMContext Context;
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auto MIRString = "--- |\n"
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" declare void @sizes()\n" +
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InputIRSnippet.str() +
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"...\n"
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"---\n"
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"name: sizes\n"
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"constants:\n"
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" - id: 0\n"
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" value: i32 12345678\n"
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" alignment: 4\n"
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"jumpTable:\n"
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" kind: inline\n"
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" entries:\n"
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" - id: 0\n"
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" blocks: [ '%bb.0' ]\n"
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"body: |\n"
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" bb.0:\n" +
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InputMIRSnippet.str();
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std::unique_ptr<MemoryBuffer> MBuffer = MemoryBuffer::getMemBuffer(MIRString);
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std::unique_ptr<MIRParser> MParser =
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createMIRParser(std::move(MBuffer), Context);
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ASSERT_TRUE(MParser);
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std::unique_ptr<Module> M = MParser->parseIRModule();
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ASSERT_TRUE(M);
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M->setTargetTriple(TM->getTargetTriple());
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M->setDataLayout(TM->createDataLayout());
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MachineModuleInfo MMI(TM);
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bool Res = MParser->parseMachineFunctions(*M, MMI);
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ASSERT_FALSE(Res);
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auto F = M->getFunction("sizes");
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ASSERT_TRUE(F != nullptr);
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auto &MF = MMI.getOrCreateMachineFunction(*F);
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Checks(*II, MF, Expected);
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}
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} // anonymous namespace
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TEST(InstSizes, PseudoInst) {
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LLVMInitializeARMTargetInfo();
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LLVMInitializeARMTarget();
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LLVMInitializeARMTargetMC();
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auto TT(Triple::normalize("thumbv8.1m.main-none-none-eabi"));
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std::string Error;
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const Target *T = TargetRegistry::lookupTarget(TT, Error);
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if (!T) {
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dbgs() << Error;
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GTEST_SKIP();
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}
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TargetOptions Options;
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auto TM = std::unique_ptr<TargetMachine>(
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T->createTargetMachine(TT, "generic", "", Options, std::nullopt,
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std::nullopt, CodeGenOptLevel::Default));
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ARMSubtarget ST(TM->getTargetTriple(), std::string(TM->getTargetCPU()),
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std::string(TM->getTargetFeatureString()),
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*static_cast<const ARMBaseTargetMachine *>(TM.get()), false);
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const ARMBaseInstrInfo *II = ST.getInstrInfo();
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auto cmpInstSize = [](const ARMBaseInstrInfo &II, MachineFunction &MF,
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unsigned &Expected) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(Expected, II.getInstSizeInBytes(*I));
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};
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runChecks(TM.get(), II, "",
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" $r0 = MOVi16_ga_pcrel"
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" target-flags(arm-lo16, arm-nonlazy) @sizes, 0\n",
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4u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" $r0 = MOVTi16_ga_pcrel $r0,"
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" target-flags(arm-hi16, arm-nonlazy) @sizes, 0\n",
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4u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" $r0 = t2MOVi16_ga_pcrel"
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" target-flags(arm-lo16, arm-nonlazy) @sizes, 0\n",
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4u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" $r0 = t2MOVTi16_ga_pcrel $r0,"
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" target-flags(arm-hi16, arm-nonlazy) @sizes, 0\n",
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4u, cmpInstSize);
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runChecks(TM.get(), II, "", " $r0 = MOVi32imm 2\n", 8u, cmpInstSize);
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runChecks(TM.get(), II, "", " $r0 = t2MOVi32imm 2\n", 8u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" SpeculationBarrierISBDSBEndBB\n"
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" tBX_RET 14, $noreg, implicit $r0\n",
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8u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" t2SpeculationBarrierISBDSBEndBB\n"
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" tBX_RET 14, $noreg, implicit $r0\n",
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8u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" SpeculationBarrierSBEndBB\n"
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" tBX_RET 14, $noreg, implicit $r0\n",
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4u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" t2SpeculationBarrierSBEndBB\n"
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" tBX_RET 14, $noreg, implicit $r0\n",
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4u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" Int_eh_sjlj_longjmp $r0, $r1, implicit-def $r7,"
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" implicit-def $lr, implicit-def $sp\n",
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16u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" tInt_eh_sjlj_longjmp $r0, $r1, implicit-def $r7,"
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" implicit-def $lr, implicit-def $sp\n",
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10u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" tInt_WIN_eh_sjlj_longjmp $r0, $r1, implicit-def $r11,"
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" implicit-def $lr, implicit-def $sp\n",
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12u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" Int_eh_sjlj_setjmp $r0, $r1, implicit-def $r0,"
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" implicit-def $r1, implicit-def $r2, implicit-def $r3,"
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" implicit-def $r4, implicit-def $r5, implicit-def $r6,"
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" implicit-def $r7, implicit-def $r8, implicit-def $r9,"
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" implicit-def $r10, implicit-def $r11, implicit-def $r12,"
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" implicit-def $lr, implicit-def $cpsr, implicit-def $q0,"
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" implicit-def $q1, implicit-def $q2, implicit-def $q3,"
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" implicit-def $q4, implicit-def $q5, implicit-def $q6,"
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" implicit-def $q7, implicit-def $q8, implicit-def $q9,"
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" implicit-def $q10, implicit-def $q11, implicit-def $q12,"
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" implicit-def $q13, implicit-def $q14, implicit-def $q15\n"
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" tBX_RET 14, $noreg, implicit $r0\n",
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20u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" Int_eh_sjlj_setjmp_nofp $r0, $r1, implicit-def $r0,"
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" implicit-def $r1, implicit-def $r2, implicit-def $r3,"
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" implicit-def $r4, implicit-def $r5, implicit-def $r6,"
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" implicit-def $r7, implicit-def $r8, implicit-def $r9,"
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" implicit-def $r10, implicit-def $r11, implicit-def $r12,"
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" implicit-def $lr, implicit-def $cpsr\n"
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" tBX_RET 14, $noreg, implicit $r0\n",
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20u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" tInt_eh_sjlj_setjmp $r0, $r1, implicit-def $r0,"
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" implicit-def $r1, implicit-def $r2, implicit-def $r3,"
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" implicit-def $r4, implicit-def $r5, implicit-def $r6,"
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" implicit-def $r7, implicit-def $r12, implicit-def $cpsr\n"
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" tBX_RET 14, $noreg, implicit $r0\n",
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12u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" t2Int_eh_sjlj_setjmp $r0, $r1, implicit-def $r0,"
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" implicit-def $r1, implicit-def $r2, implicit-def $r3,"
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" implicit-def $r4, implicit-def $r5, implicit-def $r6,"
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" implicit-def $r7, implicit-def $r8, implicit-def $r9,"
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" implicit-def $r10, implicit-def $r11, implicit-def $r12,"
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" implicit-def $lr, implicit-def $cpsr, implicit-def $q0,"
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" implicit-def $q1, implicit-def $q2, implicit-def $q3,"
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" implicit-def $q8, implicit-def $q9, implicit-def $q10,"
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" implicit-def $q11, implicit-def $q12, implicit-def $q13,"
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" implicit-def $q14, implicit-def $q15\n"
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" tBX_RET 14, $noreg, implicit $r0\n",
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12u, cmpInstSize);
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runChecks(TM.get(), II, "",
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" t2Int_eh_sjlj_setjmp_nofp $r0, $r1, implicit-def $r0,"
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" implicit-def $r1, implicit-def $r2, implicit-def $r3,"
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" implicit-def $r4, implicit-def $r5, implicit-def $r6,"
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" implicit-def $r7, implicit-def $r8, implicit-def $r9,"
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" implicit-def $r10, implicit-def $r11, implicit-def $r12,"
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" implicit-def $lr, implicit-def $cpsr\n"
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" tBX_RET 14, $noreg, implicit $r0\n",
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12u, cmpInstSize);
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runChecks(TM.get(), II, "", " CONSTPOOL_ENTRY 3, %const.0, 8\n", 8u,
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cmpInstSize);
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runChecks(TM.get(), II, "", " JUMPTABLE_ADDRS 0, %jump-table.0, 123\n", 123u,
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cmpInstSize);
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runChecks(TM.get(), II, "", " JUMPTABLE_INSTS 0, %jump-table.0, 456\n", 456u,
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cmpInstSize);
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runChecks(TM.get(), II, "", " JUMPTABLE_TBB 0, %jump-table.0, 789\n", 789u,
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cmpInstSize);
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runChecks(TM.get(), II, "", " JUMPTABLE_TBH 0, %jump-table.0, 188\n", 188u,
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cmpInstSize);
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runChecks(TM.get(), II, "", " $r0 = SPACE 40, undef $r0\n", 40u,
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cmpInstSize);
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runChecks(TM.get(), II, "", " INLINEASM &\"movs r0, #42\", 1\n", 6u,
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cmpInstSize);
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runChecks(TM.get(), II,
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" define void @foo() {\n"
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" entry:\n"
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" ret void\n"
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" }\n",
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" INLINEASM_BR &\"b ${0:l}\", 1, 13, blockaddress(@foo, "
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"%ir-block.entry)\n",
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6u, cmpInstSize);
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}
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