
Although we have plans to support this, and many other, dimension level type(s), currently the tag is not supported. It will be easy to add this back once support is added. NOTE: based on discussion in https://discourse.llvm.org/t/overcoming-sparsification-limitation-on-level-types/62585 https://github.com/llvm/llvm-project/issues/51658 Reviewed By: Peiming Differential Revision: https://reviews.llvm.org/D131002
74 lines
2.9 KiB
C++
74 lines
2.9 KiB
C++
//===- DialectSparseTensor.cpp - 'sparse_tensor' dialect submodule --------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir-c/Dialect/SparseTensor.h"
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#include "mlir-c/IR.h"
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#include "mlir/Bindings/Python/PybindAdaptors.h"
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namespace py = pybind11;
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using namespace llvm;
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using namespace mlir;
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using namespace mlir::python::adaptors;
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static void populateDialectSparseTensorSubmodule(const py::module &m) {
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py::enum_<MlirSparseTensorDimLevelType>(m, "DimLevelType", py::module_local())
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.value("dense", MLIR_SPARSE_TENSOR_DIM_LEVEL_DENSE)
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.value("compressed", MLIR_SPARSE_TENSOR_DIM_LEVEL_COMPRESSED);
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mlir_attribute_subclass(m, "EncodingAttr",
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mlirAttributeIsASparseTensorEncodingAttr)
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.def_classmethod(
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"get",
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[](py::object cls,
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std::vector<MlirSparseTensorDimLevelType> dimLevelTypes,
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llvm::Optional<MlirAffineMap> dimOrdering, int pointerBitWidth,
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int indexBitWidth, MlirContext context) {
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return cls(mlirSparseTensorEncodingAttrGet(
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context, dimLevelTypes.size(), dimLevelTypes.data(),
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dimOrdering ? *dimOrdering : MlirAffineMap{nullptr},
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pointerBitWidth, indexBitWidth));
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},
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py::arg("cls"), py::arg("dim_level_types"), py::arg("dim_ordering"),
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py::arg("pointer_bit_width"), py::arg("index_bit_width"),
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py::arg("context") = py::none(),
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"Gets a sparse_tensor.encoding from parameters.")
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.def_property_readonly(
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"dim_level_types",
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[](MlirAttribute self) {
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std::vector<MlirSparseTensorDimLevelType> ret;
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for (int i = 0,
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e = mlirSparseTensorEncodingGetNumDimLevelTypes(self);
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i < e; ++i)
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ret.push_back(
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mlirSparseTensorEncodingAttrGetDimLevelType(self, i));
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return ret;
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})
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.def_property_readonly(
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"dim_ordering",
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[](MlirAttribute self) -> llvm::Optional<MlirAffineMap> {
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MlirAffineMap ret =
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mlirSparseTensorEncodingAttrGetDimOrdering(self);
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if (mlirAffineMapIsNull(ret))
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return {};
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return ret;
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})
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.def_property_readonly(
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"pointer_bit_width",
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[](MlirAttribute self) {
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return mlirSparseTensorEncodingAttrGetPointerBitWidth(self);
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})
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.def_property_readonly("index_bit_width", [](MlirAttribute self) {
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return mlirSparseTensorEncodingAttrGetIndexBitWidth(self);
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});
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}
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PYBIND11_MODULE(_mlirDialectsSparseTensor, m) {
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m.doc() = "MLIR SparseTensor dialect.";
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populateDialectSparseTensorSubmodule(m);
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}
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