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llvm-project/llvm/lib/Target/AArch64
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pawosm-arm be16b03e20
[AArch64] Remove the Z#_HI register definitions (#66353) 
The Z#_HI register definitions were created during the very early SVE
enablement work and before the SVE calling convention was locked in.

As they look entirely unused, they need to go.
2023-09-18 17:18:28 +01:00
..
AsmParser
[MC] Change tryParseRegister to return ParseStatus (NFC)
2023-09-06 10:28:12 +03:00
Disassembler
[AArch64] Remove global constructors from AArch64Disassembler.cpp.
2023-05-09 10:37:20 -07:00
GISel
[AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (#65897)
2023-09-17 09:50:12 +01:00
MCTargetDesc
[llvm] Add assembly color highlighting
2023-09-01 07:57:45 -07:00
TargetInfo
…
Utils
[AArch64][SME] NFC: Rename hasNewZAInterface to hasNewZABody.
2023-08-30 13:14:42 +00:00
AArch64.h
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AArch64.td
[AArch64] New subtarget features to control ldp and stp formation (#66098)
2023-09-14 16:58:39 +02:00
AArch64A53Fix835769.cpp
…
AArch64A57FPLoadBalancing.cpp
[MC] Make more use of MCInstrDesc::operands. NFC.
2023-01-23 11:31:41 +00:00
AArch64AdvSIMDScalarPass.cpp
…
AArch64AsmPrinter.cpp
Emit the CodeView S_ARMSWITCHTABLE debug symbol for jump tables
2023-08-31 12:06:50 -07:00
AArch64BranchTargets.cpp
…
AArch64CallingConvention.cpp
…
AArch64CallingConvention.h
…
AArch64CallingConvention.td
[AArch64][Windows] Fix the callee-saved registers for swiftcc on Windows/AArch64
2023-07-12 13:13:21 -07:00
AArch64CleanupLocalDynamicTLSPass.cpp
…
AArch64CollectLOH.cpp
[CodeGen] Make more use of MachineOperand::getOperandNo. NFC.
2023-02-07 11:50:57 +00:00
AArch64Combine.td
[AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (#65897)
2023-09-17 09:50:12 +01:00
AArch64CompressJumpTables.cpp
[AArch64CompressJumpTables] Prevent over-compression caused by invalid alignment.
2023-06-15 12:38:20 +00:00
AArch64CondBrTuning.cpp
[CodeGen][Target] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
2023-01-13 23:12:48 -08:00
AArch64ConditionalCompares.cpp
[MachineTraceMetrics][NFC] Move Strategy enum out of the class
2023-02-14 16:38:47 +03:00
AArch64ConditionOptimizer.cpp
…
AArch64DeadRegisterDefinitionsPass.cpp
[CodeGen][Target] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
2023-01-13 23:12:48 -08:00
AArch64ExpandImm.cpp
[AArch64] Use llvm::rotl and llvm::rotr (NFC)
2023-02-13 20:07:09 -08:00
AArch64ExpandImm.h
…
AArch64ExpandPseudoInsts.cpp
[AArch64][SME] Don't use OBSCURE_COPY to avoid rematerialization.
2023-09-01 13:36:03 +00:00
AArch64FalkorHWPFFix.cpp
…
AArch64FastISel.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AArch64FrameLowering.cpp
[SME] Don't scavenge a spillslot in callee-save area in presence of streaming-mode changes.
2023-09-04 10:14:44 +00:00
AArch64FrameLowering.h
[AArch64][PAC] Remove the duplication of LR sign/auth implementations
2023-08-11 14:39:18 +03:00
AArch64GenRegisterBankInfo.def
…
AArch64GlobalsTagging.cpp
Re-land: [MTE] Add AArch64GlobalsTagging Pass
2023-01-31 13:03:37 -08:00
AArch64InstrAtomics.td
SelectionDAG: Swap operands of atomic_store
2023-08-31 17:30:10 -04:00
AArch64InstrFormats.td
[AArch64] Add patterns for FMADD, FMSUB
2023-08-30 12:39:04 +02:00
AArch64InstrGISel.td
[AArch64][GlobalISel] Add lowering for constant BIT/BIF/BSP (#65897)
2023-09-17 09:50:12 +01:00
AArch64InstrInfo.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AArch64InstrInfo.h
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AArch64InstrInfo.td
[AArch64][GlobalISel] Select llvm.aarch64.neon.st* intrinsics (#65491)
2023-09-15 16:35:21 +02:00
AArch64ISelDAGToDAG.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AArch64ISelLowering.cpp
[SDAG][RISCV] Avoid neg instructions when lowering atomic_load_sub with a constant rhs
2023-09-16 17:09:41 +08:00
AArch64ISelLowering.h
[SDAG][RISCV] Avoid neg instructions when lowering atomic_load_sub with a constant rhs
2023-09-16 17:09:41 +08:00
AArch64LoadStoreOptimizer.cpp
[AArch64] New subtarget features to control ldp and stp formation (#66098)
2023-09-14 16:58:39 +02:00
AArch64LowerHomogeneousPrologEpilog.cpp
[llvm] Fix duplicate word typos. NFC
2023-09-01 18:25:16 -07:00
AArch64MachineFunctionInfo.cpp
…
AArch64MachineFunctionInfo.h
[AArch64][SME] Disable remat of VL-dependent ops when function changes streaming mode.
2023-09-01 12:13:27 +00:00
AArch64MachineScheduler.cpp
…
AArch64MachineScheduler.h
…
AArch64MacroFusion.cpp
[AArch64] Add A+B+1 and A-B-1 macro fusion for Ampere1A
2023-01-29 17:25:12 +01:00
AArch64MacroFusion.h
…
AArch64MCInstLower.cpp
[AArch64] Relax binary format switch in AArch64MCInstLower::LowerSymbolOperand to allow non-Darwin Mach-O files (#66011)
2023-09-14 11:12:30 -07:00
AArch64MCInstLower.h
[AArch64] Relax binary format switch in AArch64MCInstLower::LowerSymbolOperand to allow non-Darwin Mach-O files (#66011)
2023-09-14 11:12:30 -07:00
AArch64MIPeepholeOpt.cpp
[AArch64] Fix order of isReg and isDef checks in INSvi64 peephole.
2023-07-12 09:51:28 +01:00
AArch64PBQPRegAlloc.cpp
…
AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
[ADT] Allow llvm::enumerate to enumerate over multiple ranges
2023-03-15 19:34:22 -04:00
AArch64PfmCounters.td
…
AArch64PromoteConstant.cpp
…
AArch64RedundantCopyElimination.cpp
[AArch64] Fix debug printing crash in AArch64RedundantCopyElimination
2023-08-23 11:49:36 +01:00
AArch64RegisterBanks.td
…
AArch64RegisterInfo.cpp
[AArch64][Windows] Fix the callee-saved registers for swiftcc on Windows/AArch64
2023-07-12 13:13:21 -07:00
AArch64RegisterInfo.h
…
AArch64RegisterInfo.td
[AArch64] Remove the Z#_HI register definitions (#66353)
2023-09-18 17:18:28 +01:00
AArch64SchedA53.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedA55.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedA57.td
…
AArch64SchedA57WriteRes.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedA64FX.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedA510.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedAmpere1.td
[AArch64] Split Ampere1Write_Arith into rr/ri and rs/rx InstRWs. (#66384)
2023-09-14 16:29:30 +01:00
AArch64SchedCyclone.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedExynosM3.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedExynosM4.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedExynosM5.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedFalkor.td
…
AArch64SchedFalkorDetails.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedKryo.td
…
AArch64SchedKryoDetails.td
…
AArch64SchedNeoverseN1.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedNeoverseN2.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedNeoverseV1.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedNeoverseV2.td
[AArch64] Fix schedmodel zero latency moves for Neoverse V2
2023-09-07 10:54:38 +01:00
AArch64SchedPredExynos.td
[AArch64] Refactor predicate to check for a ZR operand (NFC)
2023-07-07 19:19:24 -05:00
AArch64SchedPredicates.td
[AArch64] Refactor predicate to check for a ZR operand (NFC)
2023-07-07 19:19:24 -05:00
AArch64SchedPredNeoverse.td
[AArch64] Fix schedmodel zero latency moves for Neoverse V2
2023-09-07 10:54:38 +01:00
AArch64SchedThunderX2T99.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedThunderX3T110.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedThunderX.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64SchedTSV110.td
[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics
2023-08-24 19:21:36 -07:00
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
…
AArch64SelectionDAGInfo.h
…
AArch64SIMDInstrOpt.cpp
…
AArch64SLSHardening.cpp
[llvm][AArch64] Fix an interaction of SLS and BTI after a returns twice call
2023-02-14 11:25:30 +00:00
AArch64SMEInstrInfo.td
[AArch64][SME] Don't use OBSCURE_COPY to avoid rematerialization.
2023-09-01 13:36:03 +00:00
AArch64SpeculationHardening.cpp
[AArch64] Avoid RegScavenger::forward in AArch64SpeculationHardening
2023-05-23 09:21:17 +01:00
AArch64StackTagging.cpp
[llvm] Drop some bitcasts and references related to typed pointers
2023-08-10 15:07:07 +02:00
AArch64StackTaggingPreRA.cpp
[NFC][AArch64] Use 'i' to encode the offset form of load/store.
2023-03-06 12:34:19 +00:00
AArch64StorePairSuppress.cpp
[MachineTraceMetrics][NFC] Move Strategy enum out of the class
2023-02-14 16:38:47 +03:00
AArch64Subtarget.cpp
[AArch64][SME] Create new interface for isSVEAvailable.
2023-09-01 12:00:36 +00:00
AArch64Subtarget.h
[AArch64][SME] Various tests should work with +sme, just as they do for +sve (#65260)
2023-09-13 11:11:51 +01:00
AArch64SVEInstrInfo.td
[llvm] Fix duplicate word typos. NFC
2023-09-01 18:25:16 -07:00
AArch64SystemOperands.td
[AArch64] Add v8.9a/v9.4a FEAT_ATS1A
2023-03-28 16:59:47 +01:00
AArch64TargetMachine.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AArch64TargetMachine.h
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AArch64TargetObjectFile.cpp
…
AArch64TargetObjectFile.h
…
AArch64TargetTransformInfo.cpp
[AArch64][SVE2] Delete an unused parameter for isExtPartOfAvgExpr, NFC
2023-09-01 23:40:52 +08:00
AArch64TargetTransformInfo.h
[AArch64][SVE2] Delete an unused parameter for isExtPartOfAvgExpr, NFC
2023-09-01 23:40:52 +08:00
CMakeLists.txt
[TableGen] Remove & Replace old GICombiner Backend
2023-08-31 13:16:07 +02:00
SMEABIPass.cpp
[AArch64][SME] Emit Zero instruction for NewZA functions
2023-09-15 11:40:30 +01:00
SMEInstrFormats.td
[Clang][AArch64] Diagnostics for SME attributes when target doesn't have 'sme'
2023-08-09 12:31:02 +00:00
SVEInstrFormats.td
[CodeGen] Disable FP LD1RX instructions generation for Neoverse-V1
2023-08-09 09:33:45 +00:00
SVEIntrinsicOpts.cpp
[llvm] Drop some bitcasts and references related to typed pointers
2023-08-10 15:07:07 +02:00