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llvm-project/llvm/test/Transforms/CodeGenPrepare/AArch64
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Harvin Iriawan db158c7c83 [AArch64] Update generic sched model to A510
Refresh of the generic scheduling model to use A510 instead of A55.
  Main benefits are to the little core, and introducing SVE scheduling information.
  Changes tested on various OoO cores, no performance degradation is seen.

  Differential Revision: https://reviews.llvm.org/D156799
2023-08-21 12:25:15 +01:00
..
combine-address-mode.ll
…
free-zext.ll
…
gather-scatter-opt-inseltpoison.ll
[IRBuilder] Use canonical i64 type for insertelement index used by vector splats.
2023-01-11 14:08:06 +00:00
gather-scatter-opt.ll
[IRBuilder] Use canonical i64 type for insertelement index used by vector splats.
2023-01-11 14:08:06 +00:00
large-offset-gep.ll
[AArch64] Update generic sched model to A510
2023-08-21 12:25:15 +01:00
lit.local.cfg
[NFC][Py Reformat] Reformat lit.local.cfg python files in llvm
2023-05-17 17:03:15 +02:00
overflow-intrinsics.ll
…
sink-free-instructions-inseltpoison.ll
[CodeGenPrepare] Avoid branch on undef UB in tests (NFC)
2023-01-03 13:51:00 +01:00
sink-free-instructions.ll
[AArch64] Sink to umull if we know tops bits are zero.
2023-01-16 10:44:38 +00:00
trunc-weird-user.ll
…
widen_switch.ll
…
zext-to-shuffle.ll
…
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