a3a3e6997b
- Algorithm operates over whole IR to attempt to minimize waits. - Add support for VALU->VALU SGPR hazards via VA_SDST/VA_VCC.
26 lines
831 B
C++
26 lines
831 B
C++
//===--- AMDGPUWaitSGPRHazards.h --------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUWAITSGPRHAZARDS_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUWAITSGPRHAZARDS_H
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#include "llvm/CodeGen/MachinePassManager.h"
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namespace llvm {
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class AMDGPUWaitSGPRHazardsPass
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: public PassInfoMixin<AMDGPUWaitSGPRHazardsPass> {
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public:
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PreservedAnalyses run(MachineFunction &MF,
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MachineFunctionAnalysisManager &MFAM);
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};
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} // namespace llvm
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#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUWAITSGPRHAZARDS_H
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