Matt Arsenault 9e7e1b2d4b GlobalISel: Implement computeNumSignBits for G_SEXTLOAD/G_ZEXTLOAD

2020-09-01 11:20:02 -04:00

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AArch64

Revert "Reapply D70800: Fix AArch64 AAPCS frame record chain"

2020-09-01 16:09:37 +01:00

AMDGPU

GlobalISel: Implement computeNumSignBits for G_SEXTLOAD/G_ZEXTLOAD

2020-09-01 11:20:02 -04:00

ARC

[ARC] Update brcc test.

2020-08-28 17:07:25 -07:00

ARM

Revert "[ARM] Register pressure with -mthumb forces register reload before each call"

2020-09-01 07:39:54 +01:00

AVR

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BPF

BPF: add a SimplifyCFG IR pass during generic Scalar/IPO optimization

2020-08-06 13:16:00 -07:00

Generic

[Tests] Be consistent w/definition of statepoint-example

2020-08-14 20:45:48 -07:00

Hexagon

[Hexagon] Fix perfect shuffle generation for single vectors

2020-08-30 06:43:16 -05:00

Inputs

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Lanai

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Mips

GlobalISel: Add generic instructions for memory intrinsics

2020-08-26 20:08:45 -04:00

MIR

MIR: Infer not-SSA for subregister defs

2020-08-27 16:56:16 -04:00

MSP430

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NVPTX

[NVPTX] Fix typo in lit test

2020-08-17 16:02:11 -04:00

PowerPC

PowerPC: Switch test to generated checks

2020-09-01 11:01:02 -04:00

RISCV

[RISC-V] ADDI/ORI/XORI x, 0 should be as cheap as a move

2020-08-27 10:32:22 +01:00

SPARC

[llvm-readobj] Update tests because of changes in llvm-readobj behavior

2020-07-20 10:39:04 +01:00

SystemZ

Revert "[BPI] Improve static heuristics for integer comparisons"

2020-08-17 20:44:33 +02:00

Thumb

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Thumb2

[ARM][MVE] Enable MVE gathers and scatters by default

2020-08-28 19:05:29 +01:00

VE

[VE] Support f128

2020-08-17 17:26:52 +09:00

WebAssembly

[SelectionDAG] Handle non-power-of-2 bitwidths in expandROT

2020-08-26 09:20:46 +01:00

WinCFGuard

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WinEH

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X86

[X86][CGP] Add gather test cases for D86371.

2020-08-31 13:12:53 -07:00

XCore

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