This reverts commit d618f1c3b12effd0c2bdb7d02108d3551f389d3d. This commit wasn't reviewed ahead of time and significant concerns were raised immediately after it landed. According to our developer policy this warrants immediate revert of the commit. https://llvm.org/docs/DeveloperPolicy.html#patch-reversion-policy Differential Revision: https://reviews.llvm.org/D155509
288 lines
6.1 KiB
C
288 lines
6.1 KiB
C
// RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck %s
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// PR10415
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__asm__ ("foo1");
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__asm__ ("foo2");
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__asm__ ("foo3");
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// CHECK: module asm "foo1"
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// CHECK-NEXT: module asm "foo2"
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// CHECK-NEXT: module asm "foo3"
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void t1(int len) {
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__asm__ volatile("" : "=&r"(len), "+&r"(len));
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}
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void t2(unsigned long long t) {
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__asm__ volatile("" : "+m"(t));
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}
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void t3(unsigned char *src, unsigned long long temp) {
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__asm__ volatile("" : "+m"(temp), "+r"(src));
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}
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void t4(void) {
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unsigned long long a;
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struct reg { unsigned long long a, b; } b;
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__asm__ volatile ("":: "m"(a), "m"(b));
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}
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// PR3417
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void t5(int i) {
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asm("nop" : "=r"(i) : "0"(t5));
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}
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// PR3641
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void t6(void) {
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__asm__ volatile("" : : "i" (t6));
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}
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void t7(int a) {
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__asm__ volatile("T7 NAMED: %[input]" : "+r"(a): [input] "i" (4));
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// CHECK: @t7(i32
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// CHECK: T7 NAMED: $1
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}
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void t8(void) {
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__asm__ volatile("T8 NAMED MODIFIER: %c[input]" :: [input] "i" (4));
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// CHECK: @t8()
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// CHECK: T8 NAMED MODIFIER: ${0:c}
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}
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// PR3682
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unsigned t9(unsigned int a) {
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asm("bswap %0 %1" : "+r" (a));
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return a;
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}
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// PR3908
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void t10(int r) {
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__asm__("PR3908 %[lf] %[xx] %[li] %[r]" : [r] "+r" (r) : [lf] "mx" (0), [li] "mr" (0), [xx] "x" ((double)(0)));
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// CHECK: @t10(
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// CHECK:PR3908 $1 $3 $2 $0
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}
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// PR3373
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unsigned t11(signed char input) {
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unsigned output;
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__asm__("xyz"
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: "=a" (output)
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: "0" (input));
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return output;
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}
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// PR3373
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unsigned char t12(unsigned input) {
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unsigned char output;
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__asm__("xyz"
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: "=a" (output)
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: "0" (input));
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return output;
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}
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unsigned char t13(unsigned input) {
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unsigned char output;
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__asm__("xyz %1"
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: "=a" (output)
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: "0" (input));
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return output;
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}
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struct large {
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int x[1000];
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};
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unsigned long t15(int x, struct large *P) {
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__asm__("xyz "
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: "=r" (x)
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: "m" (*P), "0" (x));
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return x;
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}
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// bitfield destination of an asm.
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struct S {
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int a : 4;
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};
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void t14(struct S *P) {
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__asm__("abc %0" : "=r"(P->a) );
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}
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// PR4938
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int t16(void) {
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int a,b;
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asm ( "nop;"
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:"=%c" (a)
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: "r" (b)
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);
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return 0;
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}
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// PR6475
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void t17(void) {
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int i;
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__asm__ ( "nop": "=m"(i));
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// CHECK: @t17()
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// CHECK: call void asm "nop", "=*m,
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}
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// <rdar://problem/6841383>
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int t18(unsigned data) {
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int a, b;
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asm("xyz" :"=a"(a), "=d"(b) : "a"(data));
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return a + b;
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// CHECK: t18(i32
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// CHECK: = call {{.*}}asm "xyz"
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// CHECK-NEXT: extractvalue
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// CHECK-NEXT: extractvalue
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}
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// PR6780
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int t19(unsigned data) {
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int a, b;
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asm("x{abc|def|ghi}z" :"=r"(a): "r"(data));
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return a + b;
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// CHECK: t19(i32
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// CHECK: = call {{.*}}asm "x$(abc$|def$|ghi$)z"
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}
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// PR6845 - Mismatching source/dest fp types.
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double t20(double x) {
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register long double result;
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__asm __volatile ("frndint" : "=t" (result) : "0" (x));
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return result;
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// CHECK: @t20
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// CHECK: fpext double {{.*}} to x86_fp80
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// CHECK-NEXT: call x86_fp80 asm sideeffect "frndint"
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// CHECK: fptrunc x86_fp80 {{.*}} to double
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}
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float t21(long double x) {
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register float result;
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__asm __volatile ("frndint" : "=t" (result) : "0" (x));
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return result;
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// CHECK: @t21
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// CHECK: call x86_fp80 asm sideeffect "frndint"
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// CHECK-NEXT: fptrunc x86_fp80 {{.*}} to float
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}
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// <rdar://problem/8348447> - accept 'l' constraint
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unsigned char t22(unsigned char a, unsigned char b) {
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unsigned int la = a;
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unsigned int lb = b;
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unsigned int bigres;
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unsigned char res;
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__asm__ ("0:\n1:\n" : [bigres] "=la"(bigres) : [la] "0"(la), [lb] "c"(lb) :
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"edx", "cc");
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res = bigres;
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return res;
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}
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// <rdar://problem/8348447> - accept 'l' constraint
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unsigned char t23(unsigned char a, unsigned char b) {
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unsigned int la = a;
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unsigned int lb = b;
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unsigned char res;
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__asm__ ("0:\n1:\n" : [res] "=la"(res) : [la] "0"(la), [lb] "c"(lb) :
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"edx", "cc");
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return res;
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}
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void *t24(char c) {
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void *addr;
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// CHECK: @t24
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// CHECK: zext i8 {{.*}} to i32
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// CHECK-NEXT: call ptr asm "foobar"
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__asm__ ("foobar" : "=a" (addr) : "0" (c));
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return addr;
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}
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// PR10299 - fpsr, fpcr
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void t25(void)
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{
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__asm__ __volatile__( \
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"finit" \
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: \
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: \
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:"st","st(1)","st(2)","st(3)", \
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"st(4)","st(5)","st(6)","st(7)", \
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"fpsr","fpcr" \
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);
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}
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// rdar://10510405 - AVX registers
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typedef long long __m256i __attribute__((__vector_size__(32)));
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void t26 (__m256i *p) {
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__asm__ volatile("vmovaps %0, %%ymm0" :: "m" (*(__m256i*)p) : "ymm0");
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}
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// Check to make sure the inline asm non-standard dialect attribute _not_ is
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// emitted.
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void t27(void) {
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asm volatile("nop");
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// CHECK: @t27
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// CHECK: call void asm sideeffect "nop"
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// CHECK-NOT: ia_nsdialect
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// CHECK: ret void
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}
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// Check handling of '*' and '#' constraint modifiers.
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void t28(void)
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{
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asm volatile ("/* %0 */" : : "i#*X,*r" (1));
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// CHECK: @t28
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// CHECK: call void asm sideeffect "/* $0 */", "i|r,~{dirflag},~{fpsr},~{flags}"(i32 1)
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}
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static unsigned t29_var[1];
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void t29(void) {
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asm volatile("movl %%eax, %0"
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:
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: "m"(t29_var));
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// CHECK: @t29
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// CHECK: call void asm sideeffect "movl %eax, $0", "*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype([1 x i32]) @t29_var)
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}
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void t30(int len) {
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__asm__ volatile(""
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: "+&&rm"(len));
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// CHECK: @t30
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// CHECK: call void asm sideeffect "", "=*&rm,0,~{dirflag},~{fpsr},~{flags}"
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}
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void t31(int len) {
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__asm__ volatile(""
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: "+%%rm"(len), "+rm"(len));
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// CHECK: @t31
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// CHECK: call void asm sideeffect "", "=*%rm,=*rm,0,1,~{dirflag},~{fpsr},~{flags}"
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}
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// CHECK: @t32
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int t32(int cond)
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{
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asm goto("testl %0, %0; jne %l1;" :: "r"(cond)::label_true, loop);
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// CHECK: callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %0) #1
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// CHECK-NEXT: to label %asm.fallthrough [label %label_true, label %loop]
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return 0;
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loop:
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return 0;
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label_true:
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return 1;
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}
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void *t33(void *ptr)
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{
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void *ret;
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asm ("lea %1, %0" : "=r" (ret) : "p" (ptr));
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return ret;
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// CHECK: @t33
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// CHECK: %1 = call ptr asm "lea $1, $0", "=r,p,~{dirflag},~{fpsr},~{flags}"(ptr %0)
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}
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