fd739804e0
For a default visibility external linkage definition, dso_local is set for ELF
-fno-pic/-fpie and COFF and Mach-O. Since default clang -cc1 for ELF is similar
to -fpic ("PIC Level" is not set), this nuance causes unneeded binary format differences.
To make emitted IR similar, ELF -cc1 -fpic will default to -fno-semantic-interposition,
which sets dso_local for default visibility external linkage definitions.
To make this flip smooth and enable future (dso_local as definition default),
this patch replaces (function) `define ` with `define{{.*}} `,
(variable/constant/alias) `= ` with `={{.*}} `, or inserts appropriate `{{.*}} `.
35 lines
1.7 KiB
C
35 lines
1.7 KiB
C
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck %s
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#include <arm_neon.h>
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// CHECK-LABEL: define{{.*}} <2 x float> @test_vmaxnm_f32(<2 x float> %a, <2 x float> %b) #0 {
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// CHECK: [[VMAXNM_V2_I:%.*]] = call <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float> %a, <2 x float> %b) #3
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// CHECK: ret <2 x float> [[VMAXNM_V2_I]]
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float32x2_t test_vmaxnm_f32(float32x2_t a, float32x2_t b) {
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return vmaxnm_f32(a, b);
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}
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// CHECK-LABEL: define{{.*}} <4 x float> @test_vmaxnmq_f32(<4 x float> %a, <4 x float> %b) #1 {
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// CHECK: [[VMAXNMQ_V2_I:%.*]] = call <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float> %a, <4 x float> %b) #3
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// CHECK: ret <4 x float> [[VMAXNMQ_V2_I]]
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float32x4_t test_vmaxnmq_f32(float32x4_t a, float32x4_t b) {
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return vmaxnmq_f32(a, b);
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}
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// CHECK-LABEL: define{{.*}} <2 x float> @test_vminnm_f32(<2 x float> %a, <2 x float> %b) #0 {
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// CHECK: [[VMINNM_V2_I:%.*]] = call <2 x float> @llvm.arm.neon.vminnm.v2f32(<2 x float> %a, <2 x float> %b) #3
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// CHECK: ret <2 x float> [[VMINNM_V2_I]]
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float32x2_t test_vminnm_f32(float32x2_t a, float32x2_t b) {
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return vminnm_f32(a, b);
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}
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// CHECK-LABEL: define{{.*}} <4 x float> @test_vminnmq_f32(<4 x float> %a, <4 x float> %b) #1 {
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// CHECK: [[VMINNMQ_V2_I:%.*]] = call <4 x float> @llvm.arm.neon.vminnm.v4f32(<4 x float> %a, <4 x float> %b) #3
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// CHECK: ret <4 x float> [[VMINNMQ_V2_I]]
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float32x4_t test_vminnmq_f32(float32x4_t a, float32x4_t b) {
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return vminnmq_f32(a, b);
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}
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// CHECK: attributes #0 ={{.*}}"min-legal-vector-width"="64"
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// CHECK: attributes #1 ={{.*}}"min-legal-vector-width"="128"
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