For a definition (of most linkage types), dso_local is set for ELF -fno-pic/-fpie
and COFF, but not for Mach-O. This nuance causes unneeded binary format differences.
This patch replaces (function) `define ` with `define{{.*}} `,
(variable/constant/alias) `= ` with `={{.*}} `, or inserts appropriate `{{.*}} `
if there is an explicit linkage.
* Clang will set dso_local for Mach-O, which is currently implied by TargetMachine.cpp. This will make COFF/Mach-O and executable ELF similar.
* Eventually I hope we can make dso_local the textual LLVM IR default (write explicit "dso_preemptable" when applicable) and -fpic ELF will be similar to everything else. This patch helps move toward that goal.
49 lines
1.6 KiB
C
49 lines
1.6 KiB
C
// RUN: %clang_cc1 %s -triple x86_64-apple-darwin -emit-llvm -o - | FileCheck %s
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// Exercise various use cases for local asm "register variables".
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int foo() {
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// CHECK-LABEL: define{{.*}} i32 @foo()
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// CHECK: [[A:%[a-zA-Z0-9]+]] = alloca i32
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register int a asm("rsi")=5;
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// CHECK: store i32 5, i32* [[A]]
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asm volatile("; %0 This asm defines rsi" : "=r"(a));
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// CHECK: [[Z:%[a-zA-Z0-9]+]] = call i32 asm sideeffect "; $0 This asm defines rsi", "={rsi},~{dirflag},~{fpsr},~{flags}"()
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// CHECK: store i32 [[Z]], i32* [[A]]
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a = 42;
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// CHECK: store i32 42, i32* [[A]]
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asm volatile("; %0 This asm uses rsi" : : "r"(a));
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// CHECK: [[TMP:%[a-zA-Z0-9]+]] = load i32, i32* [[A]]
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// CHECK: call void asm sideeffect "; $0 This asm uses rsi", "{rsi},~{dirflag},~{fpsr},~{flags}"(i32 [[TMP]])
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return a;
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// CHECK: [[TMP1:%[a-zA-Z0-9]+]] = load i32, i32* [[A]]
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// CHECK: ret i32 [[TMP1]]
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}
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int earlyclobber() {
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// CHECK-LABEL: define{{.*}} i32 @earlyclobber()
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// CHECK: [[A:%[a-zA-Z0-9]+]] = alloca i32
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register int a asm("rsi")=5;
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// CHECK: store i32 5, i32* [[A]]
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asm volatile("; %0 This asm defines rsi" : "=&r"(a));
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// CHECK: [[Z:%[a-zA-Z0-9]+]] = call i32 asm sideeffect "; $0 This asm defines rsi", "=&{rsi},~{dirflag},~{fpsr},~{flags}"()
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// CHECK: store i32 [[Z]], i32* [[A]]
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a = 42;
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// CHECK: store i32 42, i32* [[A]]
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asm volatile("; %0 This asm uses rsi" : : "r"(a));
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// CHECK: [[TMP:%[a-zA-Z0-9]+]] = load i32, i32* [[A]]
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// CHECK: call void asm sideeffect "; $0 This asm uses rsi", "{rsi},~{dirflag},~{fpsr},~{flags}"(i32 [[TMP]])
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return a;
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// CHECK: [[TMP1:%[a-zA-Z0-9]+]] = load i32, i32* [[A]]
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// CHECK: ret i32 [[TMP1]]
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}
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