NOTE: There is a mailing list discussion on this: http://lists.llvm.org/pipermail/llvm-dev/2019-December/137632.html Complemantary to the assumption outliner prototype in D71692, this patch shows how we could simplify the code emitted for an alignemnt assumption. The generated code is smaller, less fragile, and it makes it easier to recognize the additional use as a "assumption use". As mentioned in D71692 and on the mailing list, we could adopt this scheme, and similar schemes for other patterns, without adopting the assumption outlining.
132 lines
5.6 KiB
C
132 lines
5.6 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s | FileCheck %s
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// CHECK-LABEL: define {{[^@]+}}@test1
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// CHECK-SAME: (i32* [[A:%.*]]) #0
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
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// CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to i8*
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// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(i8* [[TMP1]], i64 32, i64 0) ]
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// CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
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// CHECK-NEXT: store i32* [[TMP2]], i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i64 0
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// CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
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// CHECK-NEXT: ret i32 [[TMP4]]
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//
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int test1(int *a) {
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a = __builtin_assume_aligned(a, 32, 0ull);
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return a[0];
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}
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// CHECK-LABEL: define {{[^@]+}}@test2
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// CHECK-SAME: (i32* [[A:%.*]]) #0
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
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// CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to i8*
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// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(i8* [[TMP1]], i64 32, i64 0) ]
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// CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
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// CHECK-NEXT: store i32* [[TMP2]], i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i64 0
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// CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
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// CHECK-NEXT: ret i32 [[TMP4]]
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//
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int test2(int *a) {
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a = __builtin_assume_aligned(a, 32, 0);
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return a[0];
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}
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// CHECK-LABEL: define {{[^@]+}}@test3
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// CHECK-SAME: (i32* [[A:%.*]]) #0
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
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// CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to i8*
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// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(i8* [[TMP1]], i64 32) ]
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// CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
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// CHECK-NEXT: store i32* [[TMP2]], i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i64 0
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// CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
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// CHECK-NEXT: ret i32 [[TMP4]]
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//
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int test3(int *a) {
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a = __builtin_assume_aligned(a, 32);
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return a[0];
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}
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// CHECK-LABEL: define {{[^@]+}}@test4
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// CHECK-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #0
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
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// CHECK-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
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// CHECK-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to i8*
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// CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[B_ADDR]], align 4
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// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP2]] to i64
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// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(i8* [[TMP1]], i64 32, i64 [[CONV]]) ]
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// CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i32*
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// CHECK-NEXT: store i32* [[TMP3]], i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i64 0
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// CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
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// CHECK-NEXT: ret i32 [[TMP5]]
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//
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int test4(int *a, int b) {
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a = __builtin_assume_aligned(a, 32, b);
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return a[0];
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}
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int *m1() __attribute__((assume_aligned(64)));
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// CHECK-LABEL: define {{[^@]+}}@test5() #0
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[CALL:%.*]] = call align 64 i32* (...) @m1()
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
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// CHECK-NEXT: ret i32 [[TMP0]]
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//
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int test5() {
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return *m1();
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}
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int *m2() __attribute__((assume_aligned(64, 12)));
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// CHECK-LABEL: define {{[^@]+}}@test6() #0
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[CALL:%.*]] = call i32* (...) @m2()
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// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[CALL]], i64 64, i64 12) ]
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
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// CHECK-NEXT: ret i32 [[TMP0]]
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//
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int test6() {
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return *m2();
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}
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// CHECK-LABEL: define {{[^@]+}}@pr43638
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// CHECK-SAME: (i32* [[A:%.*]]) #0
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
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// CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[TMP0]] to i8*
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// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(i8* [[TMP1]], i64 536870912) ]
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// CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
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// CHECK-NEXT: store i32* [[TMP2]], i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8
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// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i64 0
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// CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
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// CHECK-NEXT: ret i32 [[TMP4]]
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//
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int pr43638(int *a) {
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a = __builtin_assume_aligned(a, 4294967296);
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return a[0];
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}
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