fd739804e0
For a default visibility external linkage definition, dso_local is set for ELF
-fno-pic/-fpie and COFF and Mach-O. Since default clang -cc1 for ELF is similar
to -fpic ("PIC Level" is not set), this nuance causes unneeded binary format differences.
To make emitted IR similar, ELF -cc1 -fpic will default to -fno-semantic-interposition,
which sets dso_local for default visibility external linkage definitions.
To make this flip smooth and enable future (dso_local as definition default),
this patch replaces (function) `define ` with `define{{.*}} `,
(variable/constant/alias) `= ` with `={{.*}} `, or inserts appropriate `{{.*}} `.
42 lines
1.5 KiB
C
42 lines
1.5 KiB
C
// RUN: %clang_cc1 -Werror -triple x86_64-linux -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -Werror -triple i386-linux -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -Werror -triple armv7-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM
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// RUN: %clang_cc1 -Werror -triple powerpc64le-linux -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -Werror -triple aarch64-linux -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -DINFRONT -Werror -triple x86_64-linux -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -DINFRONT -Werror -triple i386-linux -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -DINFRONT -Werror -triple armv7-linux -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM
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// RUN: %clang_cc1 -DINFRONT -Werror -triple powerpc64le-linux -emit-llvm -o - %s | FileCheck %s
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// RUN: %clang_cc1 -DINFRONT -Werror -triple aarch64-linux -emit-llvm -o - %s | FileCheck %s
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#ifdef INFRONT
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typedef union __attribute__((transparent_union)) {
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void *f0;
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} transp_t0;
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#else
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typedef union {
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void *f0;
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} transp_t0 __attribute__((transparent_union));
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#endif
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void f0(transp_t0 obj);
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// CHECK-LABEL: define{{.*}} void @f1_0(i32* %a0)
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// CHECK: call void @f0(i8* %{{.*}})
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// CHECK: call void %{{.*}}(i8* %{{[a-z0-9]*}})
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// CHECK: }
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// ARM-LABEL: define{{.*}} arm_aapcscc void @f1_0(i32* %a0)
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// ARM: call arm_aapcscc void @f0(i8* %{{.*}})
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// ARM: call arm_aapcscc void %{{.*}}(i8* %{{[a-z0-9]*}})
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// ARM: }
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void f1_0(int *a0) {
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void (*f0p)(void *) = f0;
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f0(a0);
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f0p(a0);
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}
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void f1_1(int *a0) {
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f0((transp_t0) { a0 });
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}
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