11bf7da64a
The GPUDivergenceAnalysis is now renamed to just "DivergenceAnalysis" since there is no conflict with LegacyDivergenceAnalysis. In the legacy PM, this analysis can only be used through the legacy DA serving as a wrapper. It is now made available as a pass in the new PM, and has no relation with the legacy DA. The new DA currently cannot handle irreducible control flow; its presence can cause the analysis to run indefinitely. The analysis is now modified to detect this and report all instructions in the function as divergent. This is super conservative, but allows the analysis to be used without hanging the compiler. Reviewed By: aeubanks Differential Revision: https://reviews.llvm.org/D96615
64 lines
2.5 KiB
LLVM
64 lines
2.5 KiB
LLVM
; RUN: opt -mtriple amdgcn-unknown-amdhsa -enable-new-pm=0 -analyze -divergence -use-gpu-divergence-analysis %s | FileCheck %s
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; RUN: opt -mtriple amdgcn-unknown-amdhsa -passes='print<divergence>' -disable-output %s 2>&1 | FileCheck %s
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; CHECK-LABEL: for function 'readfirstlane':
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define amdgpu_kernel void @readfirstlane() {
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%id.x = call i32 @llvm.amdgcn.workitem.id.x()
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; CHECK: DIVERGENT: %id.x = call i32 @llvm.amdgcn.workitem.id.x()
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%first.lane = call i32 @llvm.amdgcn.readfirstlane(i32 %id.x)
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; CHECK-NOT: DIVERGENT: %first.lane = call i32 @llvm.amdgcn.readfirstlane(i32 %id.x)
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ret void
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}
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; CHECK-LABEL: for function 'icmp':
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define amdgpu_kernel void @icmp(i32 inreg %x) {
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; CHECK-NOT: DIVERGENT: %icmp = call i64 @llvm.amdgcn.icmp.i32
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%icmp = call i64 @llvm.amdgcn.icmp.i32(i32 %x, i32 0, i32 33)
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ret void
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}
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; CHECK-LABEL: for function 'fcmp':
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define amdgpu_kernel void @fcmp(float inreg %x, float inreg %y) {
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; CHECK-NOT: DIVERGENT: %fcmp = call i64 @llvm.amdgcn.fcmp.i32
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%fcmp = call i64 @llvm.amdgcn.fcmp.i32(float %x, float %y, i32 33)
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ret void
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}
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; CHECK-LABEL: for function 'ballot':
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define amdgpu_kernel void @ballot(i1 inreg %x) {
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; CHECK-NOT: DIVERGENT: %ballot = call i64 @llvm.amdgcn.ballot.i32
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%ballot = call i64 @llvm.amdgcn.ballot.i32(i1 %x)
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ret void
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}
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; SGPR asm outputs are uniform regardless of the input operands.
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; CHECK-LABEL: for function 'asm_sgpr':
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; CHECK: DIVERGENT: i32 %divergent
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; CHECK-NOT: DIVERGENT
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define i32 @asm_sgpr(i32 %divergent) {
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%sgpr = call i32 asm "; def $0, $1","=s,v"(i32 %divergent)
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ret i32 %sgpr
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}
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; CHECK-LABEL: Divergence Analysis' for function 'asm_mixed_sgpr_vgpr':
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; CHECK: DIVERGENT: %asm = call { i32, i32 } asm "; def $0, $1, $2", "=s,=v,v"(i32 %divergent)
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; CHECK-NEXT: {{^[ \t]+}}%sgpr = extractvalue { i32, i32 } %asm, 0
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; CHECK-NEXT: DIVERGENT: %vgpr = extractvalue { i32, i32 } %asm, 1
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define void @asm_mixed_sgpr_vgpr(i32 %divergent) {
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%asm = call { i32, i32 } asm "; def $0, $1, $2","=s,=v,v"(i32 %divergent)
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%sgpr = extractvalue { i32, i32 } %asm, 0
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%vgpr = extractvalue { i32, i32 } %asm, 1
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store i32 %sgpr, i32 addrspace(1)* undef
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store i32 %vgpr, i32 addrspace(1)* undef
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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declare i32 @llvm.amdgcn.readfirstlane(i32) #0
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declare i64 @llvm.amdgcn.icmp.i32(i32, i32, i32) #1
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declare i64 @llvm.amdgcn.fcmp.i32(float, float, i32) #1
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declare i64 @llvm.amdgcn.ballot.i32(i1) #1
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind readnone convergent }
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