11bf7da64a
The GPUDivergenceAnalysis is now renamed to just "DivergenceAnalysis" since there is no conflict with LegacyDivergenceAnalysis. In the legacy PM, this analysis can only be used through the legacy DA serving as a wrapper. It is now made available as a pass in the new PM, and has no relation with the legacy DA. The new DA currently cannot handle irreducible control flow; its presence can cause the analysis to run indefinitely. The analysis is now modified to detect this and report all instructions in the function as divergent. This is super conservative, but allows the analysis to be used without hanging the compiler. Reviewed By: aeubanks Differential Revision: https://reviews.llvm.org/D96615
27 lines
1.2 KiB
LLVM
27 lines
1.2 KiB
LLVM
; RUN: opt -mtriple=amdgcn-- -enable-new-pm=0 -analyze -divergence -use-gpu-divergence-analysis %s | FileCheck %s
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; RUN: opt -mtriple amdgcn-- -passes='print<divergence>' -disable-output %s 2>&1 | FileCheck %s
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; CHECK: for function 'interp_p1_f16'
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; CHECK: DIVERGENT: %p1 = call float @llvm.amdgcn.interp.p1.f16
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define amdgpu_ps float @interp_p1_f16(float inreg %i, float inreg %j, i32 inreg %m0) #0 {
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main_body:
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%p1 = call float @llvm.amdgcn.interp.p1.f16(float %i, i32 1, i32 2, i1 0, i32 %m0)
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ret float %p1
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}
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; CHECK: for function 'interp_p2_f16'
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; CHECK: DIVERGENT: %p2 = call half @llvm.amdgcn.interp.p2.f16
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define amdgpu_ps half @interp_p2_f16(float inreg %i, float inreg %j, i32 inreg %m0) #0 {
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main_body:
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%p2 = call half @llvm.amdgcn.interp.p2.f16(float %i, float %j, i32 1, i32 2, i1 0, i32 %m0)
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ret half %p2
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}
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; float @llvm.amdgcn.interp.p1.f16(i, attrchan, attr, high, m0)
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declare float @llvm.amdgcn.interp.p1.f16(float, i32, i32, i1, i32) #0
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; half @llvm.amdgcn.interp.p1.f16(p1, j, attrchan, attr, high, m0)
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declare half @llvm.amdgcn.interp.p2.f16(float, float, i32, i32, i1, i32) #0
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declare float @llvm.amdgcn.interp.mov(i32, i32, i32, i32) #0
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attributes #0 = { nounwind readnone }
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