5744502a13
If we wait until the type is legalized, we'll lose information about the orginal type and need to use larger magic constants. This gets especially bad on RISCV64 where i64 is the only legal type. I've limited this to simple scalar types so it only works for i8/i16/i32 which are most likely to occur. For more odd types we might want to do a small promotion to a type where MULH is legal instead. Unfortunately, this does prevent some urem/srem+seteq matching since that still require legal types. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D96210
284 lines
8.5 KiB
LLVM
284 lines
8.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
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;------------------------------------------------------------------------------;
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; Odd divisors
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;------------------------------------------------------------------------------;
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define i32 @test_srem_odd(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_odd:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #52429
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; CHECK-NEXT: mov w9, #39321
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; CHECK-NEXT: movk w8, #52428, lsl #16
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; CHECK-NEXT: movk w9, #6553, lsl #16
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; CHECK-NEXT: madd w8, w0, w8, w9
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; CHECK-NEXT: mov w9, #858993459
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; CHECK-NEXT: cmp w8, w9
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 5
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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define i32 @test_srem_odd_25(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_odd_25:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #23593
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; CHECK-NEXT: mov w9, #47185
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; CHECK-NEXT: movk w8, #49807, lsl #16
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; CHECK-NEXT: movk w9, #1310, lsl #16
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; CHECK-NEXT: madd w8, w0, w8, w9
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; CHECK-NEXT: mov w9, #28835
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; CHECK-NEXT: movk w9, #2621, lsl #16
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; CHECK-NEXT: cmp w8, w9
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 25
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; This is like test_srem_odd, except the divisor has bit 30 set.
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define i32 @test_srem_odd_bit30(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_odd_bit30:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #43691
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; CHECK-NEXT: movk w8, #27306, lsl #16
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; CHECK-NEXT: orr w9, wzr, #0x1
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; CHECK-NEXT: madd w8, w0, w8, w9
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; CHECK-NEXT: cmp w8, #3 // =3
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 1073741827
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; This is like test_srem_odd, except the divisor has bit 31 set.
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define i32 @test_srem_odd_bit31(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_odd_bit31:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #21845
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; CHECK-NEXT: movk w8, #54613, lsl #16
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; CHECK-NEXT: orr w9, wzr, #0x1
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; CHECK-NEXT: madd w8, w0, w8, w9
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; CHECK-NEXT: cmp w8, #3 // =3
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 2147483651
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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;------------------------------------------------------------------------------;
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; Even divisors
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;------------------------------------------------------------------------------;
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define i16 @test_srem_even(i16 %X) nounwind {
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; CHECK-LABEL: test_srem_even:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sxth w8, w0
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; CHECK-NEXT: mov w9, #18725
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; CHECK-NEXT: mul w8, w8, w9
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; CHECK-NEXT: asr w9, w8, #18
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; CHECK-NEXT: add w8, w9, w8, lsr #31
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; CHECK-NEXT: mov w9, #14
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; CHECK-NEXT: msub w8, w8, w9, w0
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; CHECK-NEXT: tst w8, #0xffff
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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%srem = srem i16 %X, 14
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%cmp = icmp ne i16 %srem, 0
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%ret = zext i1 %cmp to i16
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ret i16 %ret
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}
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define i32 @test_srem_even_100(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_even_100:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #23593
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; CHECK-NEXT: mov w9, #47184
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; CHECK-NEXT: movk w8, #49807, lsl #16
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; CHECK-NEXT: movk w9, #1310, lsl #16
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; CHECK-NEXT: madd w8, w0, w8, w9
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; CHECK-NEXT: mov w9, #23593
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; CHECK-NEXT: ror w8, w8, #2
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; CHECK-NEXT: movk w9, #655, lsl #16
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; CHECK-NEXT: cmp w8, w9
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 100
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; This is like test_srem_even, except the divisor has bit 30 set.
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define i32 @test_srem_even_bit30(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_even_bit30:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #20165
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; CHECK-NEXT: movk w8, #64748, lsl #16
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; CHECK-NEXT: orr w9, wzr, #0x8
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; CHECK-NEXT: madd w8, w0, w8, w9
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; CHECK-NEXT: ror w8, w8, #3
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; CHECK-NEXT: cmp w8, #3 // =3
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 1073741928
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; This is like test_srem_odd, except the divisor has bit 31 set.
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define i32 @test_srem_even_bit31(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_even_bit31:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #1285
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; CHECK-NEXT: movk w8, #50437, lsl #16
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; CHECK-NEXT: orr w9, wzr, #0x2
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; CHECK-NEXT: madd w8, w0, w8, w9
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; CHECK-NEXT: ror w8, w8, #1
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; CHECK-NEXT: cmp w8, #3 // =3
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 2147483750
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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;------------------------------------------------------------------------------;
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; Special case
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;------------------------------------------------------------------------------;
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; 'NE' predicate is fine too.
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define i32 @test_srem_odd_setne(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_odd_setne:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #52429
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; CHECK-NEXT: mov w9, #39321
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; CHECK-NEXT: movk w8, #52428, lsl #16
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; CHECK-NEXT: movk w9, #6553, lsl #16
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; CHECK-NEXT: madd w8, w0, w8, w9
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; CHECK-NEXT: mov w9, #13106
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; CHECK-NEXT: movk w9, #13107, lsl #16
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; CHECK-NEXT: cmp w8, w9
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; CHECK-NEXT: cset w0, hi
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 5
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%cmp = icmp ne i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; The fold is only valid for positive divisors, negative-ones should be negated.
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define i32 @test_srem_negative_odd(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_negative_odd:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #52429
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; CHECK-NEXT: mov w9, #39321
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; CHECK-NEXT: movk w8, #52428, lsl #16
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; CHECK-NEXT: movk w9, #6553, lsl #16
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; CHECK-NEXT: madd w8, w0, w8, w9
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; CHECK-NEXT: mov w9, #13106
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; CHECK-NEXT: movk w9, #13107, lsl #16
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; CHECK-NEXT: cmp w8, w9
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; CHECK-NEXT: cset w0, hi
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; CHECK-NEXT: ret
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%srem = srem i32 %X, -5
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%cmp = icmp ne i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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define i32 @test_srem_negative_even(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_negative_even:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #28087
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; CHECK-NEXT: mov w9, #9362
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; CHECK-NEXT: movk w8, #46811, lsl #16
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; CHECK-NEXT: movk w9, #4681, lsl #16
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; CHECK-NEXT: madd w8, w0, w8, w9
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; CHECK-NEXT: ror w8, w8, #1
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; CHECK-NEXT: cmp w8, w9
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; CHECK-NEXT: cset w0, hi
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; CHECK-NEXT: ret
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%srem = srem i32 %X, -14
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%cmp = icmp ne i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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;------------------------------------------------------------------------------;
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; Negative tests
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;------------------------------------------------------------------------------;
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; We can lower remainder of division by one much better elsewhere.
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define i32 @test_srem_one(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_one:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w0, #1
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 1
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; We can lower remainder of division by powers of two much better elsewhere.
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define i32 @test_srem_pow2(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_pow2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, #15 // =15
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; CHECK-NEXT: cmp w0, #0 // =0
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; CHECK-NEXT: csel w8, w8, w0, lt
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; CHECK-NEXT: and w8, w8, #0xfffffff0
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; CHECK-NEXT: cmp w0, w8
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 16
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; The fold is only valid for positive divisors, and we can't negate INT_MIN.
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define i32 @test_srem_int_min(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_int_min:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #2147483647
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; CHECK-NEXT: add w8, w0, w8
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; CHECK-NEXT: cmp w0, #0 // =0
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; CHECK-NEXT: csel w8, w8, w0, lt
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; CHECK-NEXT: and w8, w8, #0x80000000
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; CHECK-NEXT: cmn w0, w8
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 2147483648
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; We can lower remainder of division by all-ones much better elsewhere.
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define i32 @test_srem_allones(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_allones:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmp w0, #0 // =0
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; CHECK-NEXT: csel w8, w0, w0, lt
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; CHECK-NEXT: cmp w0, w8
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 4294967295
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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