3ec3fcb97a
In narrowExtractedVectorLoad there is an optimisation that tries to combine extract_subvector with a narrowing vector load. At the moment this produces warnings due to the incorrect calls to getVectorNumElements() for scalable vector types. I've got this working for scalable vectors too when the extract subvector index is a multiple of the minimum number of elements. I have added a new variant of the function: MachineFunction::getMachineMemOperand that copies an existing MachineMemOperand, but replaces the pointer info with a null version since we cannot currently represent scaled offsets. I've added a new test for this particular case in: CodeGen/AArch64/sve-extract-subvector.ll Differential Revision: https://reviews.llvm.org/D83950
83 lines
3.5 KiB
LLVM
83 lines
3.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
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; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
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; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
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; WARN-NOT: warning
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; Test that DAGCombiner doesn't drop the scalable flag when it tries to fold:
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; extract_subv (bitcast X), Index --> bitcast (extract_subv X, Index')
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define <vscale x 16 x i8> @extract_nxv16i8_nxv4i64(<vscale x 4 x i64> %z0_z1) {
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; CHECK-LABEL: extract_nxv16i8_nxv4i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov z0.d, z1.d
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; CHECK-NEXT: ret
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%z0_z1_bc = bitcast <vscale x 4 x i64> %z0_z1 to <vscale x 32 x i8>
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%ext = call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv32i8(<vscale x 32 x i8> %z0_z1_bc, i32 1)
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ret <vscale x 16 x i8> %ext
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}
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define <vscale x 2 x i64> @extract_nxv2i64_nxv32i8(<vscale x 32 x i8> %z0_z1) {
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; CHECK-LABEL: extract_nxv2i64_nxv32i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov z0.d, z1.d
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; CHECK-NEXT: ret
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%z0_z1_bc = bitcast <vscale x 32 x i8> %z0_z1 to <vscale x 4 x i64>
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%ext = call <vscale x 2 x i64> @llvm.aarch64.sve.tuple.get.nxv4i64(<vscale x 4 x i64> %z0_z1_bc, i32 1)
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ret <vscale x 2 x i64> %ext
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}
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define <vscale x 4 x half> @extract_lo_nxv4f16_nxv8f16(<vscale x 8 x half> %z0) {
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; CHECK-LABEL: extract_lo_nxv4f16_nxv8f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uunpklo z0.s, z0.h
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; CHECK-NEXT: ret
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%ext = call <vscale x 4 x half> @llvm.aarch64.sve.tuple.get.nxv8f16(<vscale x 8 x half> %z0, i32 0)
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ret <vscale x 4 x half> %ext
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}
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define <vscale x 4 x half> @extract_hi_nxv4f16_nxv8f16(<vscale x 8 x half> %z0) {
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; CHECK-LABEL: extract_hi_nxv4f16_nxv8f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uunpkhi z0.s, z0.h
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; CHECK-NEXT: ret
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%ext = call <vscale x 4 x half> @llvm.aarch64.sve.tuple.get.nxv8f16(<vscale x 8 x half> %z0, i32 1)
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ret <vscale x 4 x half> %ext
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}
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define <vscale x 2 x float> @extract_lo_nxv2f32_nxv4f32(<vscale x 4 x float> %z0) {
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; CHECK-LABEL: extract_lo_nxv2f32_nxv4f32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uunpklo z0.d, z0.s
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; CHECK-NEXT: ret
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%ext = call <vscale x 2 x float> @llvm.aarch64.sve.tuple.get.nxv4f32(<vscale x 4 x float> %z0, i32 0)
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ret <vscale x 2 x float> %ext
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}
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define <vscale x 2 x float> @extract_hi_nxv2f32_nxv4f32(<vscale x 4 x float> %z0) {
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; CHECK-LABEL: extract_hi_nxv2f32_nxv4f32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uunpkhi z0.d, z0.s
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; CHECK-NEXT: ret
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%ext = call <vscale x 2 x float> @llvm.aarch64.sve.tuple.get.nxv4f32(<vscale x 4 x float> %z0, i32 1)
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ret <vscale x 2 x float> %ext
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}
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define <vscale x 4 x float> @load_extract_nxv4f32_nxv8f32(<vscale x 8 x float>* %p) {
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; CHECK-LABEL: load_extract_nxv4f32_nxv8f32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: ld1w { z0.s }, p0/z, [x0, #1, mul vl]
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; CHECK-NEXT: ret
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%tmp1 = load <vscale x 8 x float>, <vscale x 8 x float>* %p, align 16
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%tmp2 = call <vscale x 4 x float> @llvm.aarch64.sve.tuple.get.nxv8f32(<vscale x 8 x float> %tmp1, i32 1)
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ret <vscale x 4 x float> %tmp2
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}
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declare <vscale x 2 x i64> @llvm.aarch64.sve.tuple.get.nxv4i64(<vscale x 4 x i64>, i32)
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declare <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv32i8(<vscale x 32 x i8>, i32)
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declare <vscale x 2 x float> @llvm.aarch64.sve.tuple.get.nxv4f32(<vscale x 4 x float>, i32)
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declare <vscale x 4 x half> @llvm.aarch64.sve.tuple.get.nxv8f16(<vscale x 8 x half>, i32)
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declare <vscale x 4 x float> @llvm.aarch64.sve.tuple.get.nxv8f32(<vscale x 8 x float>, i32)
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