llvm-project/llvm/test/CodeGen/AArch64/wineh-frame5.mir
Martin Storsjö 3780a4e568 [AArch64] Match the windows canonical callee saved register order
On windows, the callee saved registers in a canonical prologue are
ordered starting from a lower register number at a lower stack
address (with the possible gap for aligning the stack at the top);
this is the opposite order that llvm normally produces.

To achieve this, reverse the order of the registers in the
assignCalleeSavedSpillSlots callback, to get the stack objects
laid out by PrologEpilogInserter in the right order, and adjust
computeCalleeSaveRegisterPairs to lay them out from the bottom up.

This allows generated prologs more often to match the format that
allows the unwind info to be written as packed info.

Differential Revision: https://reviews.llvm.org/D88677
2020-10-03 21:37:22 +03:00

132 lines
5.2 KiB
YAML

# RUN: llc -o - %s -mtriple=aarch64-windows -start-before=prologepilog \
# RUN: -stop-after=prologepilog | FileCheck %s
# Check multiple epilogues, save_reg, save_reg_x.
# CHECK-LABEL: bb.0.entry:
# CHECK: early-clobber $sp = frame-setup STRXpre killed $x19, $sp, -32
# CHECK-NEXT: frame-setup SEH_SaveReg_X 19, -32
# CHECK-NEXT: frame-setup STPXi killed $fp, killed $lr, $sp, 1
# CHECK-NEXT: frame-setup SEH_SaveFPLR 8
# CHECK-NEXT: $sp = frame-setup SUBXri $sp, 496, 0
# CHECK-NEXT: frame-setup SEH_StackAlloc 496
# CHECK-NEXT: frame-setup SEH_PrologEnd
# CHECK-LABEL: bb.1.if.then:
# CHECK: frame-destroy SEH_EpilogStart
# CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 496, 0
# CHECK-NEXT: frame-destroy SEH_StackAlloc 496
# CHECK-NEXT: $fp, $lr = frame-destroy LDPXi $sp, 1
# CHECK-NEXT: frame-destroy SEH_SaveFPLR 8
# CHECK-NEXT: early-clobber $sp, $x19 = frame-destroy LDRXpost $sp, 32
# CHECK-NEXT: frame-destroy SEH_SaveReg_X 19, -32
# CHECK-NEXT: frame-destroy SEH_EpilogEnd
# CHECK-NEXT: TCRETURNdi @"?func2@@YAHXZ", 0, csr_aarch64_aapcs, implicit $sp
--- |
target datalayout = "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-windows-msvc19.11.0"
define dso_local i32 @"?func@@YAHH@Z"(i32 %i) local_unnamed_addr #0 {
entry:
%B = alloca [123 x i32], align 4
%call = tail call i32 @"?func2@@YAHXZ"()
%cmp = icmp sgt i32 %i, 2
br i1 %cmp, label %if.then, label %if.else
if.then: ; preds = %entry
%call1 = tail call i32 @"?func2@@YAHXZ"()
ret i32 %call1
if.else: ; preds = %entry
%0 = bitcast [123 x i32]* %B to i8*
call void @llvm.lifetime.start.p0i8(i64 492, i8* nonnull %0) #3
%arraydecay7 = bitcast [123 x i32]* %B to i32*
%call2 = call i32 @"?func3@@YAHPEAH@Z"(i32* nonnull %arraydecay7)
call void @llvm.lifetime.end.p0i8(i64 492, i8* nonnull %0) #3
ret i32 %call2
}
; Function Attrs: argmemonly nounwind
declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #1
declare dso_local i32 @"?func2@@YAHXZ"() local_unnamed_addr #2
declare dso_local i32 @"?func3@@YAHPEAH@Z"(i32*) local_unnamed_addr #2
; Function Attrs: argmemonly nounwind
declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #1
; Function Attrs: nounwind
declare void @llvm.stackprotector(i8*, i8**) #3
attributes #0 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+neon" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { argmemonly nounwind }
attributes #2 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+neon" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #3 = { nounwind }
...
---
name: '?func@@YAHH@Z'
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
hasWinCFI: false
registers:
liveins:
- { reg: '$w0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 4
adjustsStack: true
hasCalls: true
stackProtector: ''
maxCallFrameSize: 0
cvBytesOfCalleeSavedRegisters: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 492
savePoint: ''
restorePoint: ''
fixedStack:
stack:
- { id: 0, name: B, type: default, offset: 0, size: 492, alignment: 4,
stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -492, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
body: |
bb.0.entry:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $w0
renamable $w19 = COPY $w0
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
BL @"?func2@@YAHXZ", csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def dead $w0
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
dead $wzr = SUBSWri killed renamable $w19, 3, 0, implicit-def $nzcv
Bcc 11, %bb.2, implicit killed $nzcv
B %bb.1
bb.1.if.then:
TCRETURNdi @"?func2@@YAHXZ", 0, csr_aarch64_aapcs, implicit $sp
bb.2.if.else:
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
$x0 = ADDXri %stack.0.B, 0, 0
BL @"?func3@@YAHPEAH@Z", csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp, implicit-def $w0
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
RET_ReallyLR implicit $w0
...