69fac677bc
Perfect shuffle instruction (vdealvdd/vshuffvdd) work on vector pairs. When given a single input vector, half of it first needs to be transposed into the other vector before the generated shuffles can take effect. Also the first transpose needs to be undone at the end (this last step was missing).
30 lines
766 B
LLVM
30 lines
766 B
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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;
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; Check that the resulting register pair has the registers in the right order.
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; CHECK: vdeal
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; CHECK: vdeal
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; CHECK: v[[V1:[0-9]+]]:[[V0:[0-9]+]] = vshuff
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: vmem(r[[RA:[0-9]+]]+#0) = v[[V0]]
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r0 = memw(r1+#0)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r1 = memw(r1+#4)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r31:30 = dealloc_return(r30):raw
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; CHECK-NEXT: }
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define i64 @foo(<64 x i16> %a0, <64 x i16> %a1) #0 {
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%v0 = icmp ugt <64 x i16> %a0, %a1
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%v1 = bitcast <64 x i1> %v0 to i64
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ret i64 %v1
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}
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attributes #0 = { nounwind readnone "target-cpu"="hexagonv66" "target-features"="+hvx,+hvx-length128b,-packets" }
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