be7d425edc
This patch is the initial patch for support of the AIX extended vector ABI. The extended ABI treats vector registers V20-V31 as non-volatile and we add them as callee saved registers in this patch. Reviewed By: sfertile Differential Revision: https://reviews.llvm.org/D88676
91 lines
3.9 KiB
LLVM
91 lines
3.9 KiB
LLVM
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
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; RUN: -code-model=small -stop-after=machine-cp < %s | FileCheck \
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; RUN: --check-prefix=32SMALL-MIR %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
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; RUN: -code-model=large -stop-after=machine-cp < %s | FileCheck \
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; RUN: --check-prefix=32LARGE-MIR %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
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; RUN: -code-model=small -stop-after=machine-cp < %s | FileCheck \
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; RUN: --check-prefix=64SMALL-MIR %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
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; RUN: -code-model=large -stop-after=machine-cp < %s | FileCheck \
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; RUN: --check-prefix=64LARGE-MIR %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
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; RUN: -code-model=small < %s | FileCheck --check-prefixes=32SMALL-ASM,SMALL-ASM %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
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; RUN: -code-model=large < %s | FileCheck --check-prefixes=32LARGE-ASM,LARGE-ASM %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
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; RUN: -code-model=small < %s | FileCheck --check-prefixes=64SMALL-ASM,SMALL-ASM %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
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; RUN: -code-model=large < %s | FileCheck --check-prefixes=64LARGE-ASM,LARGE-ASM %s
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define float @test_float() {
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entry:
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ret float 5.500000e+00
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}
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; 32SMALL-MIR: renamable $r[[REG1:[0-9]+]] = LWZtoc %const.0, $r2 :: (load 4 from got)
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; 32SMALL-MIR: renamable $f[[REG2:[0-9]+]] = LFS 0, killed renamable $r[[REG1]] :: (load 4 from constant-pool)
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; 32LARGE-MIR: renamable $r[[REG1:[0-9]+]] = ADDIStocHA $r2, %const.0
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; 32LARGE-MIR: renamable $r[[REG2:[0-9]+]] = LWZtocL %const.0, killed renamable $r[[REG1]], implicit $r2 :: (load 4 from got)
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; 32LARGE-MIR: renamable $f[[REG3:[0-9]+]] = LFS 0, killed renamable $r[[REG2]] :: (load 4 from constant-pool)
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; 64SMALL-MIR: renamable $x[[REG1:[0-9]+]] = LDtocCPT %const.0, $x2 :: (load 8 from got)
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; 64SMALL-MIR: renamable $f[[REG2:[0-9]+]] = LFS 0, killed renamable $x[[REG1]] :: (load 4 from constant-pool)
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; 64LARGE-MIR: renamable $x[[REG1:[0-9]+]] = ADDIStocHA8 $x2, %const.0
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; 64LARGE-MIR: renamable $x[[REG2:[0-9]+]] = LDtocL %const.0, killed renamable $x[[REG1]], implicit $x2 :: (load 8 from got)
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; 64LARGE-MIR: renamable $f[[REG3:[0-9]+]] = LFS 0, killed renamable $x[[REG2]] :: (load 4 from constant-pool)
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; 32SMALL-ASM: .csect .rodata[RO],2
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; 32SMALL-ASM: .align 2
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; 32SMALL-ASM: L..CPI0_0:
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; 32SMALL-ASM: .vbyte 4, 0x40b00000
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; 32SMALL-ASM: .test_float:
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; 32SMALL-ASM: lwz [[REG1:[0-9]+]], L..C0(2)
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; 32SMALL-ASM: lfs 1, 0([[REG1]])
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; 32SMALL-ASM: blr
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; 32LARGE-ASM: .csect .rodata[RO],2
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; 32LARGE-ASM: .align 2
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; 32LARGE-ASM: L..CPI0_0:
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; 32LARGE-ASM: .vbyte 4, 0x40b00000
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; 32LARGE-ASM: .test_float:
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; 32LARGE-ASM: addis [[REG1:[0-9]+]], L..C0@u(2)
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; 32LARGE-ASM: lwz [[REG2:[0-9]+]], L..C0@l([[REG1]])
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; 32LARGE-ASM: lfs 1, 0([[REG2]])
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; 32LARGE-ASM: blr
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; 64SMALL-ASM: .csect .rodata[RO],2
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; 64SMALL-ASM: .align 2
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; 64SMALL-ASM: L..CPI0_0:
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; 64SMALL-ASM: .vbyte 4, 0x40b00000
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; 64SMALL-ASM: .test_float:
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; 64SMALL-ASM: ld [[REG1:[0-9]+]], L..C0(2)
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; 64SMALL-ASM: lfs 1, 0([[REG1]])
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; 64SMALL-ASM: blr
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; 64LARGE-ASM: .csect .rodata[RO],2
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; 64LARGE-ASM: .align 2
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; 64LARGE-ASM: L..CPI0_0:
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; 64LARGE-ASM: .vbyte 4, 0x40b00000
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; 64LARGE-ASM: .test_float:
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; 64LARGE-ASM: addis [[REG1:[0-9]+]], L..C0@u(2)
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; 64LARGE-ASM: ld [[REG2:[0-9]+]], L..C0@l([[REG1]])
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; 64LARGE-ASM: lfs 1, 0([[REG2]])
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; 64LARGE-ASM: blr
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; SMALL-ASM: .toc
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; SMALL-ASM: .tc L..CPI0_0[TC],L..CPI0_0
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; LARGE-ASM: .toc
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; LARGE-ASM: .tc L..CPI0_0[TE],L..CPI0_0
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