06c192d454
Upgrade of the IR text tests should be the only thing blocking making typed byval mandatory. Partially done through regex and partially manual.
110 lines
4.1 KiB
LLVM
110 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-linux -mattr=-avx | FileCheck %s -check-prefix=X64
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; Win64 has not supported byval yet.
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; RUN: llc < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X86
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%struct.s = type { i16, i16, i16, i16, i16, i16, i16, i16,
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i16, i16, i16, i16, i16, i16, i16, i16,
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i16, i16, i16, i16, i16, i16, i16, i16,
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i16, i16, i16, i16, i16, i16, i16, i16,
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i16, i16, i16, i16, i16, i16, i16, i16,
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i16, i16, i16, i16, i16, i16, i16, i16,
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i16, i16, i16, i16, i16, i16, i16, i16,
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i16, i16, i16, i16, i16, i16, i16, i16,
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i16 }
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define void @g(i16 signext %a1, i16 signext %a2, i16 signext %a3,
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; X64-LABEL: g:
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; X64: # %bb.0: # %entry
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; X64-NEXT: pushq %rbx
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; X64-NEXT: subq $288, %rsp # imm = 0x120
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; X64-NEXT: movw %di, {{[0-9]+}}(%rsp)
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; X64-NEXT: movw %si, {{[0-9]+}}(%rsp)
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; X64-NEXT: movw %dx, {{[0-9]+}}(%rsp)
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; X64-NEXT: movw %cx, {{[0-9]+}}(%rsp)
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; X64-NEXT: movw %r8w, {{[0-9]+}}(%rsp)
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; X64-NEXT: movw %r9w, {{[0-9]+}}(%rsp)
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; X64-NEXT: leaq {{[0-9]+}}(%rsp), %rbx
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; X64-NEXT: movl $16, %ecx
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; X64-NEXT: movq %rsp, %rdi
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; X64-NEXT: movq %rbx, %rsi
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; X64-NEXT: rep;movsq (%rsi), %es:(%rdi)
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; X64-NEXT: movzwl {{[0-9]+}}(%rsp), %eax
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; X64-NEXT: movw %ax, {{[0-9]+}}(%rsp)
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; X64-NEXT: callq f
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; X64-NEXT: movl $16, %ecx
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; X64-NEXT: movq %rsp, %rdi
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; X64-NEXT: movq %rbx, %rsi
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; X64-NEXT: rep;movsq (%rsi), %es:(%rdi)
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; X64-NEXT: movzwl {{[0-9]+}}(%rsp), %eax
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; X64-NEXT: movw %ax, {{[0-9]+}}(%rsp)
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; X64-NEXT: callq f
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; X64-NEXT: addq $288, %rsp # imm = 0x120
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; X64-NEXT: popq %rbx
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; X64-NEXT: retq
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;
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; X86-LABEL: g:
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; X86: # %bb.0: # %entry
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; X86-NEXT: pushl %ebp
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; X86-NEXT: movl %esp, %ebp
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; X86-NEXT: pushl %ebx
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: andl $-16, %esp
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; X86-NEXT: subl $288, %esp # imm = 0x120
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; X86-NEXT: movzwl 8(%ebp), %eax
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: movzwl 12(%ebp), %eax
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: movzwl 16(%ebp), %eax
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: movzwl 20(%ebp), %eax
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: movzwl 24(%ebp), %eax
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: movzwl 28(%ebp), %eax
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: leal {{[0-9]+}}(%esp), %ebx
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; X86-NEXT: movl $32, %ecx
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; X86-NEXT: movl %esp, %edi
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; X86-NEXT: movl %ebx, %esi
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; X86-NEXT: rep;movsl (%esi), %es:(%edi)
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: calll f
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; X86-NEXT: movl $32, %ecx
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; X86-NEXT: movl %esp, %edi
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; X86-NEXT: movl %ebx, %esi
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; X86-NEXT: rep;movsl (%esi), %es:(%edi)
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: calll f
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; X86-NEXT: leal -12(%ebp), %esp
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: popl %ebx
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; X86-NEXT: popl %ebp
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; X86-NEXT: retl
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i16 signext %a4, i16 signext %a5, i16 signext %a6) nounwind {
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entry:
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%a = alloca %struct.s, align 16
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%tmp = getelementptr %struct.s, %struct.s* %a, i32 0, i32 0
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store i16 %a1, i16* %tmp, align 16
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%tmp2 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 1
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store i16 %a2, i16* %tmp2, align 16
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%tmp4 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 2
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store i16 %a3, i16* %tmp4, align 16
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%tmp6 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 3
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store i16 %a4, i16* %tmp6, align 16
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%tmp8 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 4
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store i16 %a5, i16* %tmp8, align 16
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%tmp10 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 5
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store i16 %a6, i16* %tmp10, align 16
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call void @f(%struct.s* byval(%struct.s) %a)
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call void @f(%struct.s* byval(%struct.s) %a)
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ret void
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}
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declare void @f(%struct.s* byval(%struct.s))
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