15a31389b2
As discussed on D92645, we don't do a good job of recognising when we don't require the full width of a ymm/zmm build vector because the upper elements are undef/zero. This commit allows us to make use of implicit zeroing of upper elements with AVX instructions, which we emulate in DAG with a INSERT_SUBVECTOR into the bottom of a undef/zero vector of the original type. This exposed a limitation in getTargetConstantBitsFromNode which didn't extract bits from INSERT_SUBVECTORs of different element widths which I've included as well to prevent a couple of regressions.
100 lines
6.1 KiB
LLVM
100 lines
6.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s
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declare <4 x float> @foo(<4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
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; Due to a bug in X86RegisterInfo::getLargestLegalSuperClass this test case was trying to use XMM16 and spill it without VLX support for the necessary store instruction. We briefly implemented the spill using VEXTRACTF32X4, but the bug in getLargestLegalSuperClass has now been fixed so we no longer use XMM16.
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define <4 x float> @bar(<4 x float>* %a1p, <4 x float>* %a2p, <4 x float> %a3, <4 x float> %a4, <16 x float>%c1, <16 x float>%c2) {
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; CHECK-LABEL: bar:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subq $72, %rsp
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; CHECK-NEXT: .cfi_def_cfa_offset 80
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; CHECK-NEXT: vmovaps %xmm1, %xmm9
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; CHECK-NEXT: vmovaps {{.*#+}} xmm14 = [4,22,1,17]
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; CHECK-NEXT: vpermi2ps %zmm3, %zmm2, %zmm14
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; CHECK-NEXT: vmovaps {{.*#+}} xmm10 = [4,30,1,22]
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; CHECK-NEXT: vpermi2ps %zmm3, %zmm2, %zmm10
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; CHECK-NEXT: vmovaps {{.*#+}} xmm8 = [4,28,1,29]
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; CHECK-NEXT: vpermi2ps %zmm3, %zmm2, %zmm8
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; CHECK-NEXT: vmovaps {{.*#+}} xmm7 = <5,20,u,u>
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; CHECK-NEXT: vpermi2ps %zmm3, %zmm2, %zmm7
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; CHECK-NEXT: vmovaps {{.*#+}} xmm4 = [4,21,1,7]
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; CHECK-NEXT: vpermi2ps %zmm3, %zmm2, %zmm4
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; CHECK-NEXT: vextractf128 $1, %ymm3, %xmm5
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; CHECK-NEXT: vextractf128 $1, %ymm2, %xmm6
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; CHECK-NEXT: vunpcklps {{.*#+}} xmm11 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
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; CHECK-NEXT: vinsertps {{.*#+}} xmm1 = xmm11[0,1],xmm2[1],xmm11[3]
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; CHECK-NEXT: vinsertps {{.*#+}} xmm13 = xmm1[0,1,2],xmm3[1]
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; CHECK-NEXT: vinsertps {{.*#+}} xmm6 = xmm4[0,1,2],xmm3[1]
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; CHECK-NEXT: vmovaps %xmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: vextractf32x4 $2, %zmm3, %xmm4
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; CHECK-NEXT: vblendps {{.*#+}} xmm4 = xmm1[0,1,2],xmm4[3]
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; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm2[3,3,3,3]
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; CHECK-NEXT: vunpcklps {{.*#+}} xmm5 = xmm0[0],xmm5[0],xmm0[1],xmm5[1]
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; CHECK-NEXT: vshufps {{.*#+}} xmm5 = xmm5[0,1],xmm2[1,3]
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; CHECK-NEXT: vinsertps {{.*#+}} xmm5 = xmm5[0,1,2],xmm3[1]
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; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm7[0,1],xmm2[1],xmm7[3]
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; CHECK-NEXT: vblendps {{.*#+}} xmm7 = xmm0[0,1,2],xmm3[3]
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; CHECK-NEXT: vblendps {{.*#+}} xmm12 = xmm1[0,1,2],xmm3[3]
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; CHECK-NEXT: vinsertps {{.*#+}} xmm1 = xmm8[0,1,2],xmm3[1]
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; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm3[1]
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; CHECK-NEXT: vaddps %xmm1, %xmm0, %xmm8
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; CHECK-NEXT: vshufps {{.*#+}} xmm2 = xmm11[0,1],xmm2[3,3]
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; CHECK-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm3[2]
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; CHECK-NEXT: vaddps %xmm2, %xmm14, %xmm2
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; CHECK-NEXT: vmovaps %xmm13, %xmm1
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; CHECK-NEXT: vmovaps %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: vaddps %xmm10, %xmm13, %xmm10
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; CHECK-NEXT: vaddps %xmm13, %xmm13, %xmm3
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; CHECK-NEXT: vaddps %xmm12, %xmm14, %xmm0
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; CHECK-NEXT: vaddps %xmm0, %xmm8, %xmm0
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; CHECK-NEXT: vaddps %xmm0, %xmm13, %xmm0
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; CHECK-NEXT: vmovaps %xmm3, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: vmovaps %xmm10, (%rsp)
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; CHECK-NEXT: vmovaps %xmm9, %xmm3
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: callq foo
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; CHECK-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
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; CHECK-NEXT: vaddps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1, %xmm1 # 16-byte Folded Reload
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; CHECK-NEXT: vaddps %xmm0, %xmm1, %xmm0
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; CHECK-NEXT: addq $72, %rsp
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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%a1 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 20, i32 1, i32 17>
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%a2 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 21, i32 1, i32 17>
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%a5 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 20, i32 1, i32 27>
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%a6 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 3, i32 20, i32 1, i32 17>
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%a7 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 21, i32 1, i32 17>
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%a8 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 5, i32 20, i32 1, i32 19>
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%a9 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 20, i32 1, i32 17>
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%a10 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 20, i32 1, i32 17>
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%ax2 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 20, i32 1, i32 19>
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%ax5 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 20, i32 1, i32 17>
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%ax6 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 22, i32 1, i32 18>
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%ax7 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 1, i32 20, i32 1, i32 17>
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%ax8 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 20, i32 1, i32 19>
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%ax9 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 20, i32 1, i32 17>
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%ax10 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 20, i32 1, i32 17>
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%ay2 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 20, i32 1, i32 17>
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%ay5 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 28, i32 1, i32 17>
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%ay6 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 5, i32 20, i32 1, i32 17>
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%ay7 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 30, i32 1, i32 22>
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%ay8 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 20, i32 1, i32 17>
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%ay9 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 22, i32 1, i32 17>
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%ay10 = shufflevector <16 x float>%c1, <16 x float>%c2, <4 x i32> <i32 4, i32 20, i32 3, i32 18>
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%r1 = fadd <4 x float> %ay10, %ay9
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%r2 = fadd <4 x float> %ay8, %ay7
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%r3 = fadd <4 x float> %ay6, %ay5
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%r4 = fadd <4 x float> %ay2, %ax10
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%r5 = fadd <4 x float> %ay9, %ax8
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%r6 = fadd <4 x float> %r5, %r3
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%r7 = fadd <4 x float> %a9, %r6
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%a11 = call <4 x float> @foo(<4 x float> %r7, <4 x float> %a10, <4 x float> %r1, <4 x float> %a4, <4 x float> %a5, <4 x float> %a6, <4 x float> %a7, <4 x float> %a8, <4 x float> %r2, <4 x float> %r4)
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%a12 = fadd <4 x float> %a2, %a1
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%a13 = fadd <4 x float> %a12, %a11
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ret <4 x float> %a13
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}
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