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llvm-project/llvm/test/MC/Disassembler/AArch64
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Ranjeet Singh dbd5fa1e75 [ARM] Update existing test case with +pauth targets 
Differential Revision: https://reviews.llvm.org/D94414
2021-01-11 15:39:13 +00:00
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a64-ignored-fields.txt
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arm64-advsimd.txt
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arm64-arithmetic.txt
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arm64-basic-a64-undefined.txt
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arm64-bitfield.txt
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arm64-branch.txt
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arm64-canonical-form.txt
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arm64-crc32.txt
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arm64-crypto.txt
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arm64-invalid-logical.txt
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arm64-logical.txt
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arm64-memory.txt
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arm64-non-apple-fmov.txt
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arm64-scalar-fp.txt
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arm64-system.txt
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armv8.1a-atomic.txt
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armv8.1a-lor.txt
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armv8.1a-pan.txt
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armv8.1a-rdma.txt
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armv8.1a-vhe.txt
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armv8.2a-at.txt
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armv8.2a-crypto.txt
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armv8.2a-dotprod.txt
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armv8.2a-mmfr2.txt
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armv8.2a-persistent-memory.txt
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armv8.2a-statistical-profiling.txt
[AArch64] Make Read Write System Registers Read Only
2020-02-10 14:34:24 +00:00
armv8.2a-uao.txt
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armv8.3a-complex.txt
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armv8.3a-ID_ISAR6_EL1.txt
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armv8.3a-js.txt
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armv8.3a-rcpc.txt
[ARM][AArch64] Adding Neoverse N2 CPU support
2020-11-25 11:42:54 +00:00
armv8.3a-signed-pointer.txt
[ARM] Update existing test case with +pauth targets
2021-01-11 15:39:13 +00:00
armv8.4a-actmon.txt
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armv8.4a-dit.txt
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armv8.4a-flag.txt
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armv8.4a-ldst.txt
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armv8.4a-mpam.txt
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armv8.4a-pmu.txt
[AArch64] Adding support for PMMIR_EL1 register
2019-10-18 12:40:29 +00:00
armv8.4a-ras.txt
[AArch64] Remove inexistent system register ERXTS_EL1
2020-04-29 16:43:48 +01:00
armv8.4a-tlb.txt
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armv8.4a-trace.txt
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armv8.4a-virt.txt
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armv8.4a-vncr.txt
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armv8.5a-bti.txt
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armv8.5a-dataproc.txt
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armv8.5a-mte.txt
[AArch64] Update MTE system register encodings
2019-08-21 09:09:56 +00:00
armv8.5a-persistent-memory.txt
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armv8.5a-predres.txt
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armv8.5a-rand.txt
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armv8.5a-sb.txt
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armv8.5a-specrestrict.txt
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armv8.5a-ssbs.txt
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armv8.6a-amvs.s
[ARM] add ARMv8.6-A Activity monitors virtualization extension
2020-04-05 13:31:06 +01:00
armv8.6a-bf16.txt
[PATCH] [ARM] ARMv8.6-a command-line + BFloat16 Asm Support
2020-03-26 09:17:20 +00:00
armv8.6a-ecv.txt
[ARM] Add enhanced counter virtualization system registers
2020-04-05 15:18:35 +01:00
armv8.6a-fgt.txt
[ARM] Add ARMv8.6 Fine Grain Traps system registers
2020-04-05 14:28:18 +01:00
armv8.6a-simd-matmul.txt
[AArch64] Armv8.6-a Matrix Mult Assembly + Intrinsics
2020-04-24 15:54:06 +01:00
armv8.7a-hcx.txt
[ARM][AArch64] Adding basic support for the v8.7-A architecture
2020-12-17 13:45:08 +00:00
armv8.7a-ls64.txt
[AArch64] Adding the v8.7-A LD64B/ST64B Accelerator extension
2020-12-17 13:46:23 +00:00
armv8.7a-wfxt.txt
[ARM][AArch64] Adding basic support for the v8.7-A architecture
2020-12-17 13:45:08 +00:00
armv8.7a-xs.txt
[ARM][AArch64] Adding basic support for the v8.7-A architecture
2020-12-17 13:45:08 +00:00
armv8a-fpmul-err.txt
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armv8a-fpmul.txt
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basic-a64-instructions.txt
[ARM][AArch64] Adding basic support for the v8.7-A architecture
2020-12-17 13:45:08 +00:00
basic-a64-undefined.txt
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basic-a64-unpredictable.txt
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brbe.txt
[AArch64] Add support for the Branch Record Buffer extension
2020-12-18 11:11:06 +00:00
ete.txt
[AArch64] Predictably disassemble system registers with the same encoding
2020-02-07 12:19:57 +00:00
fullfp16-neg.txt
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fullfp16-neon-neg.txt
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gicv3-regs.txt
[AArch64] Make Read Write System Registers Read Only
2020-02-10 14:34:24 +00:00
ldp-offset-predictable.txt
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ldp-postind.predictable.txt
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ldp-preind.predictable.txt
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lit.local.cfg
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neon-instructions.txt
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ras-extension.txt
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speculation-barriers.txt
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tme.txt
[AArch64] Add support for Transactional Memory Extension (TME)
2019-07-31 12:52:17 +00:00
trace-regs.txt
[AArch64] Predictably disassemble system registers with the same encoding
2020-02-07 12:19:57 +00:00
trbe.txt
[AArch64] Define ETE and TRBE system registers
2019-07-26 09:19:08 +00:00
udf.txt
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