llvm-project/llvm/test/MC/RISCV/debug-valid.s
Pengxuan Zheng 79702dd349 [RISCV] Add instruction definition for dret
Summary:
The instruction dret is used to return from debug mode and is defined in the
RISC-V debug mode spec.

https://github.com/riscv/riscv-opcodes/blob/master/opcodes-system

Reviewers: apazos, asb, lenary, luismarques

Reviewed By: apazos

Subscribers: jfb, hiraditya, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, sameer.abuasal, evandro, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78583
2020-04-24 13:27:43 -07:00

15 lines
622 B
ArmAsm

# RUN: llvm-mc %s -triple=riscv32 -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK,CHECK-INST %s
# RUN: llvm-mc %s -triple=riscv64 -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK,CHECK-INST %s
# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
# RUN: | llvm-objdump -M no-aliases -d - \
# RUN: | FileCheck -check-prefix=CHECK-INST %s
# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
# RUN: | llvm-objdump -M no-aliases -d - \
# RUN: | FileCheck -check-prefix=CHECK-INST %s
# CHECK-INST: dret
# CHECK: encoding: [0x73,0x00,0x20,0x7b]
dret