4abab5c5ca
(X | MaskC) == C --> (X & ~MaskC) == C ^ MaskC (X | MaskC) != C --> (X & ~MaskC) != C ^ MaskC We have more analyis for 'and' patterns and already lean this way in the existing code, so this should be neutral or better in IR. If this does not do as well in codegen, the problem already exists and we should fix that based on target costs/heuristics. http://volta.cs.utah.edu:8080/z/oP3ecL define void @src(i8 %x, i8 %OrC, i8 %C, i1* %p0, i1* %p1) { %or = or i8 %x, %OrC %eq = icmp eq i8 %or, %C store i1 %eq, i1* %p0 %ne = icmp ne i8 %or, %C store i1 %ne, i1* %p1 ret void } define void @tgt(i8 %x, i8 %OrC, i8 %C, i1* %p0, i1* %p1) { %NotOrC = xor i8 %OrC, -1 %a = and i8 %x, %NotOrC %NewC = xor i8 %C, %OrC %eq = icmp eq i8 %a, %NewC store i1 %eq, i1* %p0 %ne = icmp ne i8 %a, %NewC store i1 %ne, i1* %p1 ret void }
112 lines
2.9 KiB
LLVM
112 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define i1 @set_low_bit_mask_eq(i8 %x) {
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; CHECK-LABEL: @set_low_bit_mask_eq(
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; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], -2
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[TMP1]], 18
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = or i8 %x, 1
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%cmp = icmp eq i8 %sub, 19
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ret i1 %cmp
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}
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define <2 x i1> @set_low_bit_mask_ne(<2 x i8> %x) {
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; CHECK-LABEL: @set_low_bit_mask_ne(
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; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], <i8 -4, i8 -4>
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i8> [[TMP1]], <i8 16, i8 16>
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; CHECK-NEXT: ret <2 x i1> [[CMP]]
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;
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%sub = or <2 x i8> %x, <i8 3, i8 3>
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%cmp = icmp ne <2 x i8> %sub, <i8 19, i8 19>
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ret <2 x i1> %cmp
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}
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define i1 @set_low_bit_mask_ugt(i8 %x) {
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; CHECK-LABEL: @set_low_bit_mask_ugt(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[X:%.*]], 19
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = or i8 %x, 3
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%cmp = icmp ugt i8 %sub, 19
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ret i1 %cmp
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}
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define i1 @set_low_bit_mask_ult(i8 %x) {
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; CHECK-LABEL: @set_low_bit_mask_ult(
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; CHECK-NEXT: [[SUB:%.*]] = or i8 [[X:%.*]], 3
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[SUB]], 19
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = or i8 %x, 3
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%cmp = icmp ult i8 %sub, 19
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ret i1 %cmp
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}
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define i1 @set_low_bit_mask_uge(i8 %x) {
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; CHECK-LABEL: @set_low_bit_mask_uge(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[X:%.*]], 19
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = or i8 %x, 3
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%cmp = icmp uge i8 %sub, 20
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ret i1 %cmp
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}
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define i1 @set_low_bit_mask_ule(i8 %x) {
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; CHECK-LABEL: @set_low_bit_mask_ule(
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; CHECK-NEXT: [[SUB:%.*]] = or i8 [[X:%.*]], 3
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[SUB]], 19
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = or i8 %x, 3
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%cmp = icmp ule i8 %sub, 18
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ret i1 %cmp
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}
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define i1 @set_low_bit_mask_sgt(i8 %x) {
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; CHECK-LABEL: @set_low_bit_mask_sgt(
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; CHECK-NEXT: [[SUB:%.*]] = or i8 [[X:%.*]], 3
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[SUB]], 20
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = or i8 %x, 3
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%cmp = icmp sgt i8 %sub, 20
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ret i1 %cmp
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}
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define i1 @set_low_bit_mask_slt(i8 %x) {
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; CHECK-LABEL: @set_low_bit_mask_slt(
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; CHECK-NEXT: [[SUB:%.*]] = or i8 [[X:%.*]], 15
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[SUB]], 19
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = or i8 %x, 15
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%cmp = icmp slt i8 %sub, 19
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ret i1 %cmp
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}
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define i1 @set_low_bit_mask_sge(i8 %x) {
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; CHECK-LABEL: @set_low_bit_mask_sge(
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; CHECK-NEXT: [[SUB:%.*]] = or i8 [[X:%.*]], 31
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[SUB]], 50
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = or i8 %x, 31
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%cmp = icmp sge i8 %sub, 51
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ret i1 %cmp
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}
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define i1 @set_low_bit_mask_sle(i8 %x) {
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; CHECK-LABEL: @set_low_bit_mask_sle(
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; CHECK-NEXT: [[SUB:%.*]] = or i8 [[X:%.*]], 63
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[SUB]], 69
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = or i8 %x, 63
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%cmp = icmp sle i8 %sub, 68
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ret i1 %cmp
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}
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