0ac56e8eaa
This is essentially finalizes a revert of rL155136,
because nowadays the situation has improved, SCEV can model
all these patterns well, and we canonicalize rotate-like patterns
into a funnel shift intrinsics in InstCombine.
So this should not cause any pessimization.
I've verified the canonicalize-{a,l}shr-shl-to-masking.ll transforms
with alive, which confirms that we can freely preserve exact-ness,
and no-wrap flags.
Profs:
* base: https://rise4fun.com/Alive/gPQ
* exact-ness preservation: https://rise4fun.com/Alive/izi
* nuw preservation: https://rise4fun.com/Alive/DmD
* nsw preservation: https://rise4fun.com/Alive/SLN6N
* nuw nsw preservation: https://rise4fun.com/Alive/Qp7
Refs. https://reviews.llvm.org/D46760
51 lines
1.5 KiB
LLVM
51 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; Result of left shifting a non-negative integer
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; with nsw flag should also be non-negative
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define i1 @test_shift_nonnegative(i32 %a) {
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; CHECK-LABEL: @test_shift_nonnegative(
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], -1
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%b = lshr i32 %a, 2
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%shift = shl nsw i32 %b, 3
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%cmp = icmp sge i32 %shift, 0
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ret i1 %cmp
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}
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; Result of left shifting a negative integer with
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; nsw flag should also be negative
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define i1 @test_shift_negative(i32 %a, i32 %b) {
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; CHECK-LABEL: @test_shift_negative(
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; CHECK-NEXT: ret i1 true
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;
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%c = or i32 %a, -2147483648
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%d = and i32 %b, 7
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%shift = shl nsw i32 %c, %d
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%cmp = icmp slt i32 %shift, 0
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ret i1 %cmp
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}
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; If sign bit is a known zero, it cannot be a known one.
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; This test should not crash opt. The shift produces poison.
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define i32 @test_no_sign_bit_conflict1(i1 %b) {
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; CHECK-LABEL: @test_no_sign_bit_conflict1(
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; CHECK-NEXT: ret i32 undef
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;
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%sel = select i1 %b, i32 8193, i32 8192
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%mul = shl nsw i32 %sel, 18
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ret i32 %mul
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}
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; If sign bit is a known one, it cannot be a known zero.
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; This test should not crash opt. The shift produces poison.
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define i32 @test_no_sign_bit_conflict2(i1 %b) {
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; CHECK-LABEL: @test_no_sign_bit_conflict2(
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; CHECK-NEXT: ret i32 undef
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;
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%sel = select i1 %b, i32 -8193, i32 -8194
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%mul = shl nsw i32 %sel, 18
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ret i32 %mul
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}
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