ce8f10d6cb
A series of preceding patches changed the mechanism for translating MLIR to LLVM IR to use dialect interface with delayed registration. It is no longer necessary for specific dialects to derive from ModuleTranslation. Remove all virtual methods from ModuleTranslation and factor out the entry point to be a free function. Also perform some cleanups in ModuleTranslation internals. Depends On D96774 Reviewed By: nicolasvasilache Differential Revision: https://reviews.llvm.org/D96775
64 lines
2.3 KiB
C++
64 lines
2.3 KiB
C++
//===- TestConvertGPUKernelToHsaco.cpp - Test gpu kernel hsaco lowering ---===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Conversion/GPUCommon/GPUCommonPass.h"
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#include "mlir/Dialect/LLVMIR/ROCDLDialect.h"
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#include "mlir/Pass/Pass.h"
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#include "mlir/Pass/PassManager.h"
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#include "mlir/Target/LLVMIR.h"
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#include "mlir/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.h"
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#include "mlir/Target/LLVMIR/Export.h"
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#include "llvm/Support/TargetSelect.h"
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using namespace mlir;
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#if MLIR_ROCM_CONVERSIONS_ENABLED
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static OwnedBlob compileIsaToHsacoForTesting(const std::string &, Location,
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StringRef) {
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const char data[] = "HSACO";
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return std::make_unique<std::vector<char>>(data, data + sizeof(data) - 1);
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}
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static void registerROCDLDialectTranslation(MLIRContext &context) {
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DialectRegistry registry;
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registry.insert<ROCDL::ROCDLDialect>();
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registry.addDialectInterface<ROCDL::ROCDLDialect,
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ROCDLDialectLLVMIRTranslationInterface>();
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context.appendDialectRegistry(registry);
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}
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static std::unique_ptr<llvm::Module>
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translateModuleToROCDL(Operation *m, llvm::LLVMContext &llvmContext,
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StringRef moduleName) {
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registerLLVMDialectTranslation(*m->getContext());
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registerROCDLDialectTranslation(*m->getContext());
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return translateModuleToLLVMIR(m, llvmContext, moduleName);
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}
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namespace mlir {
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namespace test {
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void registerTestConvertGPUKernelToHsacoPass() {
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PassPipelineRegistration<>(
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"test-kernel-to-hsaco",
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"Convert all kernel functions to ROCm hsaco blobs",
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[](OpPassManager &pm) {
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// Initialize LLVM AMDGPU backend.
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LLVMInitializeAMDGPUTarget();
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LLVMInitializeAMDGPUTargetInfo();
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LLVMInitializeAMDGPUTargetMC();
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LLVMInitializeAMDGPUAsmPrinter();
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pm.addPass(createConvertGPUKernelToBlobPass(
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translateModuleToROCDL, compileIsaToHsacoForTesting,
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"amdgcn-amd-amdhsa", "gfx900", "-code-object-v3", "rocdl.hsaco"));
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});
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}
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} // namespace test
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} // namespace mlir
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#endif
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