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llvm-project/llvm/lib/CodeGen/SelectionDAG
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guan jian 83af24dd85
[DAG] Generalize fold (not (neg x)) -> (add X, -1) (#154348) 
Generalize `fold (not (neg x)) -> (add X, -1)` to `fold (not (sub Y, X)) -> (add X, ~Y)`

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Co-authored-by: Yui5427 <785369607@qq.com>
Co-authored-by: Simon Pilgrim <llvm-dev@redking.me.uk>
2025-09-08 15:12:59 +00:00
..
CMakeLists.txt
[SelectionDAG] Wire up -gen-sdnode-info TableGen backend (#125358)
2025-04-06 13:14:37 +03:00
DAGCombiner.cpp
[DAG] Generalize fold (not (neg x)) -> (add X, -1) (#154348)
2025-09-08 15:12:59 +00:00
FastISel.cpp
[CodeGen] Give ArgListEntry a proper constructor (NFC) (#153817)
2025-08-15 18:06:07 +02:00
FunctionLoweringInfo.cpp
[RemoveDIs][NFC] Remove dbg intrinsic handling code from SelectionDAG ISel (#144702)
2025-06-18 16:04:18 +01:00
InstrEmitter.cpp
DAG: Avoid comparing Register to unsigned 0 (#155164)
2025-08-25 15:02:08 +09:00
InstrEmitter.h
[SelectionDAG] Pass SDValue to InstrEmitter::EmitCopyFromReg. NFC (#153485)
2025-08-13 21:46:48 -07:00
LegalizeDAG.cpp
[CodeGen] Give ArgListEntry a proper constructor (NFC) (#153817)
2025-08-15 18:06:07 +02:00
LegalizeFloatTypes.cpp
[CodeGen] Remove unnecessary setTypeListBeforeSoften() parameter (NFC)
2025-08-14 10:04:56 +02:00
LegalizeIntegerTypes.cpp
[Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (#117007)
2025-09-02 15:35:15 +01:00
LegalizeTypes.cpp
[CodeGen] Use llvm::append_range (NFC) (#135567)
2025-04-13 16:36:03 -07:00
LegalizeTypes.h
[Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (#117007)
2025-09-02 15:35:15 +01:00
LegalizeTypesGeneric.cpp
[SelectionDAG] Rename MemSDNode::getOriginalAlign to getBaseAlign. NFC (#139930)
2025-05-16 09:37:02 -07:00
LegalizeVectorOps.cpp
[Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (#117007)
2025-09-02 15:35:15 +01:00
LegalizeVectorTypes.cpp
[Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (#117007)
2025-09-02 15:35:15 +01:00
MatchContext.h
…
ResourcePriorityQueue.cpp
[llvm] Support building with c++23 (#154372)
2025-08-29 12:52:07 +00:00
ScheduleDAGFast.cpp
[CodeGen] Use range-based for loops (NFC) (#138488)
2025-05-05 10:08:49 -07:00
ScheduleDAGRRList.cpp
[llvm] Use llvm::fill instead of std::fill(NFC) (#146911)
2025-07-04 14:10:28 +08:00
ScheduleDAGSDNodes.cpp
[llvm] Extract and propagate callee_type metadata
2025-07-30 14:56:39 -07:00
ScheduleDAGSDNodes.h
[SDAG] Use BatchAAResults for querying alias analysis (AA) results (#123934)
2025-01-23 09:16:09 +00:00
ScheduleDAGVLIW.cpp
[SDAG] Use BatchAAResults for querying alias analysis (AA) results (#123934)
2025-01-23 09:16:09 +00:00
SDNodeDbgValue.h
[llvm] Use llvm::copy (NFC) (#137470)
2025-04-26 15:50:38 -07:00
SDNodeInfo.cpp
[SelectionDAG] Wire up -gen-sdnode-info TableGen backend (#125358)
2025-04-06 13:14:37 +03:00
SelectionDAG.cpp
[DAG] SelectionDAG::canCreateUndefOrPoison - AVGFLOOR/AVGCEIL don't create undef/poison (#157056)
2025-09-05 11:11:15 +00:00
SelectionDAGAddressAnalysis.cpp
[CodeGen] Remove handling for lifetime.start/end on non-alloca (#149838)
2025-07-22 09:44:59 +02:00
SelectionDAGBuilder.cpp
[AMDGPU] Tail call support for whole wave functions (#145860)
2025-09-04 10:34:43 +02:00
SelectionDAGBuilder.h
[AMDGPU] Tail call support for whole wave functions (#145860)
2025-09-04 10:34:43 +02:00
SelectionDAGDumper.cpp
[Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (#117007)
2025-09-02 15:35:15 +01:00
SelectionDAGISel.cpp
[AArch64][SME] Resume streaming-mode on entry to exception handlers (#156638)
2025-09-04 12:55:12 +01:00
SelectionDAGPrinter.cpp
…
SelectionDAGTargetInfo.cpp
[SelectionDAG] Wire up -gen-sdnode-info TableGen backend (#125358)
2025-04-06 13:14:37 +03:00
StatepointLowering.cpp
[StatepointLowering] Use FrameIndex instead of TargetFrameIndex (#153555)
2025-08-15 08:02:31 +01:00
StatepointLowering.h
…
TargetLowering.cpp
[SelectionDAG] Clean up SCALAR_TO_VECTOR handling in SimplifyDemandedVectorElts (#157027)
2025-09-05 15:08:49 +02:00