
I noticed that several assertions in MLIR codebase have issues with operator precedence The issue with operator precedence in these assertions is due to the way logical operators are evaluated. The `&&` operator has higher precedence than the `||` operator, which means the assertion is currently evaluating incorrectly, like this: ``` assert((resType.getNumDynamicDims() == dynOutDims.size()) || (dynOutDims.empty() && "Either none or all output dynamic dims must be specified!")); ``` We should add parentheses around the entire expression involving `dynOutDims.empty()` to ensure that the logical conditions are grouped correctly. Here’s the corrected version: ``` assert(((resType.getNumDynamicDims() == dynOutDims.size()) || dynOutDims.empty()) && "Either none or all output dynamic dims must be specified!"); ```
197 lines
7.7 KiB
C++
197 lines
7.7 KiB
C++
//===- Utils.cpp - Utilities to support the Tensor dialect ----------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements utilities for the Tensor dialect.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/Tensor/Utils/Utils.h"
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#include "mlir/Dialect/Affine/IR/AffineOps.h"
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#include "mlir/Dialect/Arith/IR/Arith.h"
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#include "mlir/Dialect/Arith/Utils/Utils.h"
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#include "mlir/Dialect/Utils/IndexingUtils.h"
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#include "mlir/Dialect/Vector/IR/VectorOps.h"
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#include "mlir/Interfaces/ValueBoundsOpInterface.h"
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using namespace mlir;
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using namespace mlir::tensor;
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PadOp mlir::tensor::createPadHighOp(RankedTensorType resType, Value source,
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Value pad, bool nofold, Location loc,
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OpBuilder &b,
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SmallVector<Value> dynOutDims) {
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assert(((resType.getNumDynamicDims() == dynOutDims.size()) ||
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dynOutDims.empty()) &&
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"Either none or all output dynamic dims must be specified!");
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// Init "low" and "high" padding values ("low" is kept as is, "high" is
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// computed below).
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SmallVector<OpFoldResult> low(resType.getRank(), b.getIndexAttr(0));
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SmallVector<OpFoldResult> high(resType.getRank(), b.getIndexAttr(0));
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size_t outDimIdx = 0;
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for (const auto [idx, val] : enumerate(resType.getShape())) {
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bool isDimDynamic = ShapedType::isDynamic(val);
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bool updatePadHigh = !isDimDynamic || !dynOutDims.empty();
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// Keep the default padding width (i.e. "0") when the output dim is dynamic
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// and no actual output sizes have been provided.
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if (!updatePadHigh)
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continue;
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// Compute the padding width: resDim - sourceDim.
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AffineExpr d0, d1;
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bindDims(b.getContext(), d0, d1);
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OpFoldResult sourceDim = tensor::getMixedSize(b, loc, source, idx);
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OpFoldResult outDim = isDimDynamic ? OpFoldResult(dynOutDims[outDimIdx++])
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: OpFoldResult(b.getIndexAttr(val));
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high[idx] = affine::makeComposedFoldedAffineApply(b, loc, d0 - d1,
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{outDim, sourceDim});
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}
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return b.create<PadOp>(loc, resType, source, low, high, pad, nofold);
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}
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SmallVector<Value> mlir::tensor::createDynamicDimValues(OpBuilder &b,
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Location loc,
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Value rankedTensor) {
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auto tensorTy = cast<RankedTensorType>(rankedTensor.getType());
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SmallVector<Value> dynamicDims;
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for (const auto &en : llvm::enumerate(tensorTy.getShape())) {
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if (en.value() == ShapedType::kDynamic)
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dynamicDims.push_back(
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b.create<tensor::DimOp>(loc, rankedTensor, en.index()));
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}
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return dynamicDims;
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}
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FailureOr<RankedTensorType>
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mlir::tensor::computeTransposedType(RankedTensorType rankedTensorType,
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ArrayRef<int64_t> transposeVector) {
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if (transposeVector.empty())
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return rankedTensorType;
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if (!isPermutationVector(transposeVector) ||
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transposeVector.size() != static_cast<size_t>(rankedTensorType.getRank()))
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return failure();
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SmallVector<int64_t> transposedShape(rankedTensorType.getShape());
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applyPermutationToVector(transposedShape, transposeVector);
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using RTTBuilder = RankedTensorType::Builder;
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RankedTensorType transposedTensorType =
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RTTBuilder(rankedTensorType).setShape(transposedShape);
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return transposedTensorType;
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}
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/// The permutation can be obtained from two permutations:
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/// a) Compute the permutation vector to move the last `numPackedDims` into
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/// the `innerPosDims` of a shape of rank `rank`.
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/// b) Compute the permutation vector to move outer dims if the
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/// `outerPerm` parameter is not empty.
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/// Apply (b) permutation on (a) permutation to get the final permutation.
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static SmallVector<int64_t>
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computePackUnPackPerm(int64_t rank, ArrayRef<int64_t> &innerDimsPos,
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ArrayRef<int64_t> &outerPerm,
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PackingMetadata &packingMetadata) {
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int64_t numPackedDims = innerDimsPos.size();
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auto lastDims =
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llvm::to_vector(llvm::seq<int64_t>(rank - numPackedDims, rank));
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packingMetadata = computePackingMetadata(rank, innerDimsPos);
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SmallVector<int64_t> innerPositionsPerm =
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computePermutationVector(rank, lastDims, packingMetadata.insertPositions);
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SmallVector<int64_t> outerPos = packingMetadata.outerPositions;
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if (!outerPerm.empty())
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applyPermutationToVector(outerPos, outerPerm);
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SmallVector<int64_t> outerPositionPerm =
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computePermutationVector(rank, packingMetadata.outerPositions, outerPos);
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SmallVector<int64_t> packInverseDestPermutation = innerPositionsPerm;
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applyPermutationToVector(packInverseDestPermutation, outerPositionPerm);
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return packInverseDestPermutation;
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}
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SmallVector<int64_t> mlir::tensor::getPackInverseDestPerm(PackOp packOp) {
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PackingMetadata pMetadata;
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int64_t packedRank = packOp.getDestType().getRank();
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ArrayRef<int64_t> innerDimPos = packOp.getInnerDimsPos();
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ArrayRef<int64_t> outerPerm = packOp.getOuterDimsPerm();
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SmallVector<int64_t> packInvDestPerm =
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computePackUnPackPerm(packedRank, innerDimPos, outerPerm, pMetadata);
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return packInvDestPerm;
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}
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SmallVector<int64_t> mlir::tensor::getUnPackInverseSrcPerm(UnPackOp unpackOp) {
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PackingMetadata metadata;
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return mlir::tensor::getUnPackInverseSrcPerm(unpackOp, metadata);
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}
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SmallVector<int64_t>
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mlir::tensor::getUnPackInverseSrcPerm(UnPackOp unpackOp,
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PackingMetadata &metadata) {
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int64_t unpackRank = unpackOp.getSourceType().getRank();
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ArrayRef<int64_t> innerDimPos = unpackOp.getInnerDimsPos();
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ArrayRef<int64_t> outerPerm = unpackOp.getOuterDimsPerm();
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SmallVector<int64_t> unpackInvSrcPerm =
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computePackUnPackPerm(unpackRank, innerDimPos, outerPerm, metadata);
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return unpackInvSrcPerm;
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}
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bool mlir::tensor::isCastLikeInsertSliceOp(InsertSliceOp op) {
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llvm::SmallBitVector droppedDims = op.getDroppedDims();
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int64_t srcDim = 0;
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RankedTensorType resultType = op.getDestType();
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// Source dims and destination dims (apart from dropped dims) must have the
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// same size.
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for (int64_t resultDim = 0; resultDim < resultType.getRank(); ++resultDim) {
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if (droppedDims.test(resultDim)) {
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// InsertSlice may expand unit dimensions that result from inserting a
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// size-1 slice into a non-size-1 result dimension.
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if (resultType.getDimSize(resultDim) != 1)
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return false;
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continue;
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}
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FailureOr<bool> equalDimSize = ValueBoundsConstraintSet::areEqual(
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{op.getSource(), srcDim}, {op.getResult(), resultDim});
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if (failed(equalDimSize) || !*equalDimSize)
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return false;
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++srcDim;
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}
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return true;
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}
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bool mlir::tensor::isCastLikeExtractSliceOp(ExtractSliceOp op) {
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llvm::SmallBitVector droppedDims = op.getDroppedDims();
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int64_t resultDim = 0;
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// Source dims and result dims (apart from dropped dims) must have the same
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// size.
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RankedTensorType sourceType = op.getSourceType();
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for (int64_t dim = 0, e = sourceType.getRank(); dim < e; ++dim) {
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if (droppedDims.test(dim)) {
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// ExtractSlice may drop unit dimensions that result from taking a size-1
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// slice from a non-size-1 source dimension.
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if (sourceType.getDimSize(dim) != 1)
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return false;
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continue;
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}
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FailureOr<bool> equalDimSize = ValueBoundsConstraintSet::areEqual(
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{op.getSource(), dim}, {op.getResult(), resultDim});
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if (failed(equalDimSize) || !*equalDimSize)
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return false;
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++resultDim;
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}
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return true;
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}
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