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llvm-project/llvm/test/CodeGen
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Konstantin Zhuravlyov a25e0524c0 AMDGPU: Enable code object v3 for AMDHSA only 
Differential Revision: https://reviews.llvm.org/D54186

llvm-svn: 346923
2018-11-15 02:32:43 +00:00
..
AArch64
[ARM64] [Windows] Handle funclets
2018-11-09 23:33:30 +00:00
AMDGPU
AMDGPU: Enable code object v3 for AMDHSA only
2018-11-15 02:32:43 +00:00
ARC
…
ARM
[CodeGen] Fix forward scan in MachineBasicBlock::computeRegisterLiveness.
2018-11-14 00:39:29 +00:00
AVR
[AVR] Reorder the CHECK lines in directmem.ll to match current trunk
2018-11-09 23:17:59 +00:00
BPF
[bpf] Test case for symbol information in object file
2018-09-22 17:31:01 +00:00
Generic
[IR] Add a dedicated FNeg IR Instruction
2018-11-13 18:15:47 +00:00
Hexagon
[Hexagon] Implement noreturn optimization
2018-11-09 18:16:24 +00:00
Inputs
…
Lanai
…
Mips
[DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to run between vector op legalization and DAG legalization. Fix bad one use check in combineShuffleOfScalars
2018-11-09 18:04:34 +00:00
MIR
[Power9] Allow gpr callee saved spills in prologue to vectors registers
2018-11-09 16:36:24 +00:00
MSP430
Revert "[MSP430] Add MC layer"
2018-11-08 16:21:29 +00:00
Nios2
…
NVPTX
[NVPTX] Implement isLegalToVectorizeLoadChain
2018-08-27 17:29:43 +00:00
PowerPC
[PowerPC] Enhance the selection(ISD::VSELECT) of vector type
2018-11-14 02:34:45 +00:00
RISCV
[RISCV] Support .option relax and .option norelax
2018-11-12 14:25:07 +00:00
SPARC
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
SystemZ
[SystemZ] Increase the number of VLREPs
2018-11-13 08:37:09 +00:00
Thumb
[SelectionDAG] swap select_cc operands to enable folding
2018-11-09 11:09:40 +00:00
Thumb2
[ARM] Enable spilling of the hGPR register class in Thumb2
2018-11-08 13:02:10 +00:00
WebAssembly
[WebAssembly] Add support for the event section
2018-11-14 02:46:21 +00:00
WinCFGuard
[COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables
2018-09-19 09:58:30 +00:00
WinEH
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X86
[X86] Don't mark SEXTLOADS with narrow types as Custom with -x86-experimental-vector-widening-legalization.
2018-11-15 00:21:41 +00:00
XCore
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00