This moves the registry higher in the LLVM library dependency stack. Every client of the target registry needs to link against MC anyway to actually use the target, so we might as well move this out of Support. This allows us to ensure that Support doesn't have includes from MC/*. Differential Revision: https://reviews.llvm.org/D111454
114 lines
3.5 KiB
C++
114 lines
3.5 KiB
C++
//===-- XCoreTargetMachine.cpp - Define TargetMachine for XCore -----------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "XCoreTargetMachine.h"
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#include "MCTargetDesc/XCoreMCTargetDesc.h"
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#include "TargetInfo/XCoreTargetInfo.h"
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#include "XCore.h"
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#include "XCoreTargetObjectFile.h"
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#include "XCoreTargetTransformInfo.h"
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#include "llvm/ADT/Optional.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Support/CodeGen.h"
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using namespace llvm;
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static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
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return RM.getValueOr(Reloc::Static);
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}
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static CodeModel::Model
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getEffectiveXCoreCodeModel(Optional<CodeModel::Model> CM) {
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if (CM) {
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if (*CM != CodeModel::Small && *CM != CodeModel::Large)
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report_fatal_error("Target only supports CodeModel Small or Large");
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return *CM;
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}
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return CodeModel::Small;
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}
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/// Create an ILP32 architecture model
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///
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XCoreTargetMachine::XCoreTargetMachine(const Target &T, const Triple &TT,
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StringRef CPU, StringRef FS,
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const TargetOptions &Options,
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Optional<Reloc::Model> RM,
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Optional<CodeModel::Model> CM,
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CodeGenOpt::Level OL, bool JIT)
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: LLVMTargetMachine(
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T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32",
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TT, CPU, FS, Options, getEffectiveRelocModel(RM),
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getEffectiveXCoreCodeModel(CM), OL),
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TLOF(std::make_unique<XCoreTargetObjectFile>()),
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Subtarget(TT, std::string(CPU), std::string(FS), *this) {
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initAsmInfo();
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}
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XCoreTargetMachine::~XCoreTargetMachine() = default;
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namespace {
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/// XCore Code Generator Pass Configuration Options.
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class XCorePassConfig : public TargetPassConfig {
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public:
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XCorePassConfig(XCoreTargetMachine &TM, PassManagerBase &PM)
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: TargetPassConfig(TM, PM) {}
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XCoreTargetMachine &getXCoreTargetMachine() const {
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return getTM<XCoreTargetMachine>();
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}
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void addIRPasses() override;
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bool addPreISel() override;
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bool addInstSelector() override;
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void addPreEmitPass() override;
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};
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} // end anonymous namespace
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TargetPassConfig *XCoreTargetMachine::createPassConfig(PassManagerBase &PM) {
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return new XCorePassConfig(*this, PM);
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}
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void XCorePassConfig::addIRPasses() {
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addPass(createAtomicExpandPass());
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TargetPassConfig::addIRPasses();
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}
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bool XCorePassConfig::addPreISel() {
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addPass(createXCoreLowerThreadLocalPass());
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return false;
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}
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bool XCorePassConfig::addInstSelector() {
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addPass(createXCoreISelDag(getXCoreTargetMachine(), getOptLevel()));
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return false;
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}
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void XCorePassConfig::addPreEmitPass() {
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addPass(createXCoreFrameToArgsOffsetEliminationPass(), false);
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}
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// Force static initialization.
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXCoreTarget() {
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RegisterTargetMachine<XCoreTargetMachine> X(getTheXCoreTarget());
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}
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TargetTransformInfo
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XCoreTargetMachine::getTargetTransformInfo(const Function &F) {
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return TargetTransformInfo(XCoreTTIImpl(this, F));
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}
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