Changpeng Fang 8ceb72ffe5

[AMDGPU] make v32i16/v32f16 legal (#70484) ...

Some upcoming intrinsics will be using these new types

2023-10-27 15:28:31 -07:00

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add-sub.ll

[AMDGPU] make v32i16/v32f16 legal (#70484)

2023-10-27 15:28:31 -07:00

addrspacecast.ll

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aggregates.ll

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arith-fp.ll

AMDGPU: Correctly lower llvm.sqrt.f32

2023-09-12 23:22:54 +03:00

arith-sminmax.ll

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arith-ssat.ll

[AMDGPU] make v32i16/v32f16 legal (#70484)

2023-10-27 15:28:31 -07:00

arith-uminmax.ll

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arith-usat.ll

[AMDGPU] make v32i16/v32f16 legal (#70484)

2023-10-27 15:28:31 -07:00

bit-ops.ll

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cast.ll

[opt] Infer DataLayout from triple if not specified

2023-10-26 12:07:37 -07:00

control-flow.ll

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div.ll

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extractelement.ll

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fabs.ll

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fadd.ll

[AMDGPU] make v32i16/v32f16 legal (#70484)

2023-10-27 15:28:31 -07:00

fdiv.ll

[AMDGPU] make v32i16/v32f16 legal (#70484)

2023-10-27 15:28:31 -07:00

fma.ll

[AMDGPU] make v32i16/v32f16 legal (#70484)

2023-10-27 15:28:31 -07:00

fmul.ll

[AMDGPU] make v32i16/v32f16 legal (#70484)

2023-10-27 15:28:31 -07:00

fneg.ll

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fptosi.ll

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fptoui.ll

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fround.ll

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fsub.ll

[AMDGPU] make v32i16/v32f16 legal (#70484)

2023-10-27 15:28:31 -07:00

fused_costs.ll

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gep.ll

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insertelement.ll

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lit.local.cfg

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load-to-trunc.ll

[opt] Infer DataLayout from triple if not specified

2023-10-26 12:07:37 -07:00

logicalop.ll

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mul.ll

[AMDGPU] make v32i16/v32f16 legal (#70484)

2023-10-27 15:28:31 -07:00

reduce-and.ll

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reduce-or.ll

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rem.ll

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shifts.ll

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shufflevector.ll

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