Craig Topper 0a459dd4e9 [RISCV] Add tests for selecting G_BRCOND+G_ICMP. NFC ...

These should have been part of e0e0891d741588684b0803d7724e5080f9c75537

2023-11-13 15:29:34 -08:00

..

AArch64

[AArch64] Prevent v1f16 vselect/setcc type expansion. (#72048)

2023-11-13 14:42:52 +00:00

AMDGPU

[AMDGPU] Revert "Preliminary patch for divergence driven instruction selection. Operands Folding 1." (#71710)

2023-11-13 13:53:10 +00:00

ARC

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ARM

Revert "[ARM][FPEnv] Lowering of fpenv intrinsics"

2023-11-10 16:24:51 +07:00

AVR

Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038)"

2023-10-09 12:31:32 +01:00

BPF

[SCEV] Extend isImpliedCondOperandsViaRanges to independent predicates (#71110)

2023-11-07 07:25:47 -08:00

CSKY

[CSKY,test] Update switch.ll

2023-10-31 15:47:05 -07:00

DirectX

[DirectX] Update test after opt learned to infer datalayout (#70726)

2023-10-30 14:04:15 -07:00

Generic

[IR] Remove FP cast constant expressions (#71408)

2023-11-07 09:34:16 +01:00

Hexagon

[IR] Remove zext and sext constant expressions (#71040)

2023-11-03 10:46:07 +01:00

Inputs

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Lanai

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LoongArch

[LoongArch] Improve codegen for atomic cmpxchg ops (#69339)

2023-10-19 09:21:51 +08:00

M68k

[GlobalISel][M68k] Update test after 373c343

2023-11-02 03:32:47 +01:00

Mips

[Mips] In LowerShift*Parts, xor with bits-1 instead of -1. (#71149)

2023-11-03 10:08:00 -07:00

MIR

[X86] Support EGPR (R16-R31) for APX (#70958)

2023-11-09 23:39:40 +08:00

MLRegAlloc

[mlgo][regalloc] Fix tests post 9a091de7

2023-10-27 14:03:25 -07:00

MSP430

Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038)"

2023-10-09 12:31:32 +01:00

NVPTX

[LLVM][NVPTX] Add BF16 vector instruction and fix lowering rules (#69415)

2023-11-12 21:48:31 +08:00

PowerPC

[XCOFF] Ensure .file is emitted before any .info pseudo-ops (#71577)

2023-11-09 16:03:45 -06:00

RISCV

[RISCV] Add tests for selecting G_BRCOND+G_ICMP. NFC

2023-11-13 15:29:34 -08:00

SPARC

[Sparc] Remove duplicate ALU and SETHI instructions (NFCI) (#66851)

2023-10-10 20:34:20 +03:00

SPIRV

[SPIR-V] Emit proper pointer type for OpenCL kernel arguments (#67726)

2023-10-18 20:51:53 -07:00

SystemZ

[SystemZ] Enable AtomicExpand pass (#70398)

2023-10-31 09:51:06 +01:00

Thumb

Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038)"

2023-10-09 12:31:32 +01:00

Thumb2

BlockFrequencyInfoImpl: Avoid big numbers, increase precision for small spreads

2023-10-24 20:27:39 -07:00

VE

BlockFrequencyInfoImpl: Avoid big numbers, increase precision for small spreads

2023-10-24 20:27:39 -07:00

WebAssembly

[IR] Remove zext and sext constant expressions (#71040)

2023-11-03 10:46:07 +01:00

WinCFGuard

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WinEH

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X86

[X86] Simplify regex in pr42616.ll test (#71980)

2023-11-13 11:05:42 -08:00

XCore

[RegScavenger] Simplify state tracking for backwards scavenging (#71202)

2023-11-08 09:49:07 +00:00