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llvm-project/llvm/test/Transforms/PhaseOrdering/X86
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Yingwei Zheng dc6d077396
[CVP] Infer nneg on existing zext (#72052) 
This patch infers `nneg` flags for existing zext instructions in CVP.
After https://github.com/llvm/llvm-project/pull/71534 and this patch, we
can drop `zext -> zext nneg` transform in `RISCVCodeGenPrepare`:


40671bbdef/llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp (L74-L83)

This is an alternative to #72049.
2023-11-13 22:41:37 +08:00
..
addsub-inseltpoison.ll
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addsub.ll
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ctlz-loop.ll
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earlycse-after-simplifycfg-two-entry-phi-node-folding.ll
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excessive-unrolling.ll
[CVP] Infer nneg on existing zext (#72052)
2023-11-13 22:41:37 +08:00
hoist-load-of-baseptr.ll
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horiz-math-inseltpoison.ll
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horiz-math.ll
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lit.local.cfg
[NFC][Py Reformat] Reformat lit.local.cfg python files in llvm
2023-05-17 17:03:15 +02:00
loadcombine.ll
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loop-idiom-vs-indvars.ll
Revert "[FunctionAttrs] Propagate some func/arg/ret attributes from caller to callsite (WIP)"
2023-06-13 00:53:31 -05:00
masked-memory-ops.ll
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merge-functions.ll
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nancvt.ll
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peel-before-lv-to-enable-vectorization.ll
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pixel-splat.ll
[CVP] Infer nneg on existing zext (#72052)
2023-11-13 22:41:37 +08:00
pr38280.ll
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pr48844-br-to-switch-vectorization.ll
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pr50555.ll
[PhaseOrdering] Regenerate test checks (NFC)
2023-10-12 14:40:13 +02:00
pr52078.ll
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pr52253.ll
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pr52289.ll
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pr61061.ll
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scalarization-inseltpoison.ll
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scalarization.ll
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shuffle-inseltpoison.ll
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shuffle.ll
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simplifycfg-late.ll
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speculation-vs-tbaa.ll
[PhaseOrdering] Regenerate test checks (NFC)
2023-10-12 14:40:13 +02:00
spurious-peeling.ll
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SROA-after-final-loop-unrolling-2.ll
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SROA-after-final-loop-unrolling.ll
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SROA-after-loop-unrolling.ll
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store-constant-merge.ll
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unroll-vectorizer.ll
[EarlyCSE] Compare GEP instructions based on offset (#65875)
2023-09-20 06:14:45 +08:00
unsigned-multiply-overflow-check.ll
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vdiv-nounroll.ll
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vdiv.ll
[CVP] Infer nneg on existing zext (#72052)
2023-11-13 22:41:37 +08:00
vec-load-combine.ll
Reland [InstCombine] Infer inbounds for more GEPs of dereferenceable pointers
2023-06-27 09:31:20 -07:00
vec-shift.ll
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vector-math.ll
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vector-reduction-known-first-value.ll
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vector-reductions-expanded.ll
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vector-reductions-logical.ll
[SLP]Use common logic for cost estimation of the alternate vector nodes.
2023-08-09 11:50:39 -07:00
vector-reductions.ll
Revert "Revert "[ValutTracking] Use isGuaranteedNotToBePoison in impliesPoison""
2023-05-10 14:35:55 +08:00