a776942ba1
The dialect separation was introduced to demarkate ops operating in different type systems. This is no longer the case after the LLVM dialect has migrated to using built-in vector types, so the original reason for separation is no longer valid. Squash the two dialects into one. The code size decrease isn't quite large: the ops originally in LLVM_AVX512 are preserved because they match LLVM IR intrinsics specialized for vector element bitwidth. However, it is still conceptually beneficial to have only one dialect. I originally considered to use Tablegen multiclasses to define both the type-polymorphic op and its two intrinsic-related instantiations, but decided against it given both the complexity of the required Tablegen input and its dissimilarity with the rest of ODS-defined ops, both potentially resulting in very poor maintainability. Depends On D98327 Reviewed By: nicolasvasilache, springerm Differential Revision: https://reviews.llvm.org/D98328
119 lines
4.8 KiB
C++
119 lines
4.8 KiB
C++
//===- VectorToLLVM.cpp - Conversion from Vector to the LLVM dialect ------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
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#include "../PassDetail.h"
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#include "mlir/Conversion/ArmSVEToLLVM/ArmSVEToLLVM.h"
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
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#include "mlir/Dialect/AVX512/AVX512Dialect.h"
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#include "mlir/Dialect/AVX512/Transforms.h"
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#include "mlir/Dialect/ArmNeon/ArmNeonDialect.h"
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#include "mlir/Dialect/ArmSVE/ArmSVEDialect.h"
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#include "mlir/Dialect/LLVMIR/LLVMArmSVEDialect.h"
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#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
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#include "mlir/Dialect/StandardOps/IR/Ops.h"
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#include "mlir/Dialect/Vector/VectorOps.h"
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#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
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using namespace mlir;
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using namespace mlir::vector;
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namespace {
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struct LowerVectorToLLVMPass
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: public ConvertVectorToLLVMBase<LowerVectorToLLVMPass> {
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LowerVectorToLLVMPass(const LowerVectorToLLVMOptions &options) {
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this->reassociateFPReductions = options.reassociateFPReductions;
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this->enableIndexOptimizations = options.enableIndexOptimizations;
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this->enableArmNeon = options.enableArmNeon;
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this->enableArmSVE = options.enableArmSVE;
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this->enableAVX512 = options.enableAVX512;
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}
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// Override explicitly to allow conditional dialect dependence.
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void getDependentDialects(DialectRegistry ®istry) const override {
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registry.insert<LLVM::LLVMDialect>();
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if (enableArmNeon)
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registry.insert<arm_neon::ArmNeonDialect>();
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if (enableArmSVE)
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registry.insert<LLVM::LLVMArmSVEDialect>();
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if (enableAVX512)
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registry.insert<avx512::AVX512Dialect>();
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}
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void runOnOperation() override;
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};
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} // namespace
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void LowerVectorToLLVMPass::runOnOperation() {
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// Perform progressive lowering of operations on slices and
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// all contraction operations. Also applies folding and DCE.
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{
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OwningRewritePatternList patterns;
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populateVectorToVectorCanonicalizationPatterns(patterns, &getContext());
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populateVectorSlicesLoweringPatterns(patterns, &getContext());
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populateVectorContractLoweringPatterns(patterns, &getContext());
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(void)applyPatternsAndFoldGreedily(getOperation(), std::move(patterns));
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}
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// Convert to the LLVM IR dialect.
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LLVMTypeConverter converter(&getContext());
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OwningRewritePatternList patterns;
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populateVectorToLLVMMatrixConversionPatterns(converter, patterns);
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populateVectorToLLVMConversionPatterns(
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converter, patterns, reassociateFPReductions, enableIndexOptimizations);
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populateVectorToLLVMMatrixConversionPatterns(converter, patterns);
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// Architecture specific augmentations.
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LLVMConversionTarget target(getContext());
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target.addLegalOp<LLVM::DialectCastOp>();
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target.addLegalDialect<StandardOpsDialect>();
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target.addLegalOp<UnrealizedConversionCastOp>();
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if (enableArmNeon) {
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// TODO: we may or may not want to include in-dialect lowering to
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// LLVM-compatible operations here. So far, all operations in the dialect
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// can be translated to LLVM IR so there is no conversion necessary.
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target.addLegalDialect<arm_neon::ArmNeonDialect>();
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}
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if (enableArmSVE) {
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target.addLegalDialect<LLVM::LLVMArmSVEDialect>();
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target.addIllegalDialect<arm_sve::ArmSVEDialect>();
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auto hasScalableVectorType = [](TypeRange types) {
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for (Type type : types)
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if (type.isa<arm_sve::ScalableVectorType>())
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return true;
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return false;
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};
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// Remove any ArmSVE-specific types from function signatures and results.
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populateFuncOpTypeConversionPattern(patterns, &getContext(), converter);
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target.addDynamicallyLegalOp<FuncOp>([hasScalableVectorType](FuncOp op) {
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return !hasScalableVectorType(op.getType().getInputs()) &&
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!hasScalableVectorType(op.getType().getResults());
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});
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target.addDynamicallyLegalOp<CallOp, CallIndirectOp, ReturnOp>(
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[hasScalableVectorType](Operation *op) {
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return !hasScalableVectorType(op->getOperandTypes()) &&
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!hasScalableVectorType(op->getResultTypes());
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});
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populateArmSVEToLLVMConversionPatterns(converter, patterns);
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}
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if (enableAVX512) {
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configureAVX512LegalizeForExportTarget(target);
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populateAVX512LegalizeForLLVMExportPatterns(converter, patterns);
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}
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if (failed(
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applyPartialConversion(getOperation(), target, std::move(patterns))))
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signalPassFailure();
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}
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std::unique_ptr<OperationPass<ModuleOp>>
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mlir::createConvertVectorToLLVMPass(const LowerVectorToLLVMOptions &options) {
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return std::make_unique<LowerVectorToLLVMPass>(options);
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}
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