02769f2b3f
As far as I can tell treating s1 values as legal makes no sense. There are no allocatable 1-bit registers. SelectionDAG legalizes the usual set of boolean operations to 32-bits, and this should do the same. This avoids some special case handling in the selector of s1 values, and some extra code to look through truncates. This makes some code worse at -O0, since nothing cleans up the and 1 the artifact combiner inserts. We could probably add some non-essential combines or teach the artifact combiner to elide intermediates betweeen boolean uses and defs.
73 lines
1.3 KiB
YAML
73 lines
1.3 KiB
YAML
# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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define void @unconditional_br() { ret void }
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define void @conditional_br() { ret void }
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define void @indirect_br() { ret void }
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...
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---
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# CHECK-LABEL: name: unconditional_br
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name: unconditional_br
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legalized: true
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regBankSelected: true
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# CHECK: body:
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# CHECK: bb.0:
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# CHECK: successors: %bb.0
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# CHECK: B %bb.0
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body: |
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bb.0:
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successors: %bb.0
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G_BR %bb.0
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...
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---
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# CHECK-LABEL: name: conditional_br
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name: conditional_br
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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# CHECK: body:
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# CHECK: bb.0:
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# CHECK: TBNZW %1, 0, %bb.1
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# CHECK: B %bb.0
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body: |
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bb.0:
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successors: %bb.0, %bb.1
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%1(s32) = COPY $w0
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G_BRCOND %1, %bb.1
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G_BR %bb.0
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bb.1:
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...
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---
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# CHECK-LABEL: name: indirect_br
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name: indirect_br
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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# CHECK: body:
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# CHECK: bb.0:
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# CHECK: %0:gpr64 = COPY $x0
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# CHECK: BR %0
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body: |
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bb.0:
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successors: %bb.0, %bb.1
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%0(p0) = COPY $x0
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G_BRINDIRECT %0(p0)
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bb.1:
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...
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