dc6d077396
This patch infers `nneg` flags for existing zext instructions in CVP.
After https://github.com/llvm/llvm-project/pull/71534 and this patch, we
can drop `zext -> zext nneg` transform in `RISCVCodeGenPrepare`:
40671bbdef/llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp (L74-L83)
This is an alternative to #72049.
174 lines
5.2 KiB
LLVM
174 lines
5.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=correlated-propagation -S | FileCheck %s
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declare void @use64(i64)
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define void @test1(i32 %n) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[A:%.*]] = phi i32 [ [[N:%.*]], [[ENTRY:%.*]] ], [ [[EXT:%.*]], [[FOR_BODY:%.*]] ]
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], -1
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[EXT_WIDE:%.*]] = zext nneg i32 [[A]] to i64
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; CHECK-NEXT: call void @use64(i64 [[EXT_WIDE]])
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; CHECK-NEXT: [[EXT]] = trunc i64 [[EXT_WIDE]] to i32
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; CHECK-NEXT: br label [[FOR_COND]]
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; CHECK: for.end:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for.cond
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for.cond: ; preds = %for.body, %entry
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%a = phi i32 [ %n, %entry ], [ %ext, %for.body ]
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%cmp = icmp sgt i32 %a, -1
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%ext.wide = zext i32 %a to i64
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call void @use64(i64 %ext.wide)
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%ext = trunc i64 %ext.wide to i32
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br label %for.cond
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for.end: ; preds = %for.cond
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ret void
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}
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;; Negative test to show transform doesn't happen unless n >= 0.
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define void @test2(i32 %n) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[A:%.*]] = phi i32 [ [[N:%.*]], [[ENTRY:%.*]] ], [ [[EXT:%.*]], [[FOR_BODY:%.*]] ]
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], -2
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[EXT_WIDE:%.*]] = zext i32 [[A]] to i64
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; CHECK-NEXT: call void @use64(i64 [[EXT_WIDE]])
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; CHECK-NEXT: [[EXT]] = trunc i64 [[EXT_WIDE]] to i32
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; CHECK-NEXT: br label [[FOR_COND]]
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; CHECK: for.end:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for.cond
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for.cond: ; preds = %for.body, %entry
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%a = phi i32 [ %n, %entry ], [ %ext, %for.body ]
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%cmp = icmp sgt i32 %a, -2
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%ext.wide = zext i32 %a to i64
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call void @use64(i64 %ext.wide)
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%ext = trunc i64 %ext.wide to i32
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br label %for.cond
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for.end: ; preds = %for.cond
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ret void
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}
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;; Non looping test case.
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define void @test3(i32 %n) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N:%.*]], -1
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; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[EXT_WIDE:%.*]] = zext nneg i32 [[N]] to i64
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; CHECK-NEXT: call void @use64(i64 [[EXT_WIDE]])
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; CHECK-NEXT: [[EXT:%.*]] = trunc i64 [[EXT_WIDE]] to i32
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp = icmp sgt i32 %n, -1
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br i1 %cmp, label %bb, label %exit
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bb:
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%ext.wide = zext i32 %n to i64
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call void @use64(i64 %ext.wide)
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%ext = trunc i64 %ext.wide to i32
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br label %exit
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exit:
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ret void
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}
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;; Non looping negative test case.
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define void @test4(i32 %n) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N:%.*]], -2
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; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[EXT_WIDE:%.*]] = zext i32 [[N]] to i64
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; CHECK-NEXT: call void @use64(i64 [[EXT_WIDE]])
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; CHECK-NEXT: [[EXT:%.*]] = trunc i64 [[EXT_WIDE]] to i32
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp = icmp sgt i32 %n, -2
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br i1 %cmp, label %bb, label %exit
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bb:
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%ext.wide = zext i32 %n to i64
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call void @use64(i64 %ext.wide)
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%ext = trunc i64 %ext.wide to i32
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br label %exit
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exit:
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ret void
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}
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define i64 @may_including_undef(i1 %c.1, i1 %c.2) {
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; CHECK-LABEL: @may_including_undef(
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; CHECK-NEXT: br i1 [[C_1:%.*]], label [[TRUE_1:%.*]], label [[FALSE:%.*]]
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; CHECK: true.1:
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; CHECK-NEXT: br i1 [[C_2:%.*]], label [[TRUE_2:%.*]], label [[EXIT:%.*]]
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; CHECK: true.2:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: false:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[P:%.*]] = phi i32 [ 0, [[TRUE_1]] ], [ 1, [[TRUE_2]] ], [ undef, [[FALSE]] ]
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; CHECK-NEXT: [[EXT:%.*]] = zext i32 [[P]] to i64
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; CHECK-NEXT: ret i64 [[EXT]]
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;
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br i1 %c.1, label %true.1, label %false
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true.1:
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br i1 %c.2, label %true.2, label %exit
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true.2:
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br label %exit
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false:
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br label %exit
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exit:
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%p = phi i32 [ 0, %true.1 ], [ 1, %true.2], [ undef, %false ]
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%ext = zext i32 %p to i64
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ret i64 %ext
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}
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define i64 @test_infer_at_use(i32 noundef %n) {
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; CHECK-LABEL: @test_infer_at_use(
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N:%.*]], -1
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; CHECK-NEXT: [[EXT:%.*]] = zext nneg i32 [[N]] to i64
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; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i64 [[EXT]], i64 0
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; CHECK-NEXT: ret i64 [[SELECT]]
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;
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%cmp = icmp sgt i32 %n, -1
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%ext = zext i32 %n to i64
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%select = select i1 %cmp, i64 %ext, i64 0
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ret i64 %select
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}
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