2946cd7010
to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
292 lines
8.7 KiB
C++
292 lines
8.7 KiB
C++
//===-- Hexagon.cpp -------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "InputFiles.h"
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#include "Symbols.h"
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#include "SyntheticSections.h"
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#include "Target.h"
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#include "lld/Common/ErrorHandler.h"
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#include "llvm/BinaryFormat/ELF.h"
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#include "llvm/Object/ELF.h"
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#include "llvm/Support/Endian.h"
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using namespace llvm;
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using namespace llvm::object;
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using namespace llvm::support::endian;
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using namespace llvm::ELF;
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using namespace lld;
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using namespace lld::elf;
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namespace {
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class Hexagon final : public TargetInfo {
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public:
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Hexagon();
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uint32_t calcEFlags() const override;
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RelExpr getRelExpr(RelType Type, const Symbol &S,
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const uint8_t *Loc) const override;
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void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
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void writePltHeader(uint8_t *Buf) const override;
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void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
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int32_t Index, unsigned RelOff) const override;
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};
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} // namespace
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Hexagon::Hexagon() {
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PltRel = R_HEX_JMP_SLOT;
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RelativeRel = R_HEX_RELATIVE;
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GotRel = R_HEX_GLOB_DAT;
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GotEntrySize = 4;
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// The zero'th GOT entry is reserved for the address of _DYNAMIC. The
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// next 3 are reserved for the dynamic loader.
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GotPltHeaderEntriesNum = 4;
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GotPltEntrySize = 4;
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PltEntrySize = 16;
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PltHeaderSize = 32;
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// Hexagon Linux uses 64K pages by default.
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DefaultMaxPageSize = 0x10000;
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NoneRel = R_HEX_NONE;
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}
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uint32_t Hexagon::calcEFlags() const {
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assert(!ObjectFiles.empty());
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// The architecture revision must always be equal to or greater than
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// greatest revision in the list of inputs.
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uint32_t Ret = 0;
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for (InputFile *F : ObjectFiles) {
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uint32_t EFlags = cast<ObjFile<ELF32LE>>(F)->getObj().getHeader()->e_flags;
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if (EFlags > Ret)
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Ret = EFlags;
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}
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return Ret;
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}
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static uint32_t applyMask(uint32_t Mask, uint32_t Data) {
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uint32_t Result = 0;
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size_t Off = 0;
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for (size_t Bit = 0; Bit != 32; ++Bit) {
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uint32_t ValBit = (Data >> Off) & 1;
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uint32_t MaskBit = (Mask >> Bit) & 1;
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if (MaskBit) {
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Result |= (ValBit << Bit);
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++Off;
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}
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}
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return Result;
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}
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RelExpr Hexagon::getRelExpr(RelType Type, const Symbol &S,
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const uint8_t *Loc) const {
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switch (Type) {
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case R_HEX_B9_PCREL:
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case R_HEX_B9_PCREL_X:
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case R_HEX_B13_PCREL:
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case R_HEX_B15_PCREL:
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case R_HEX_B15_PCREL_X:
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case R_HEX_6_PCREL_X:
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case R_HEX_32_PCREL:
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return R_PC;
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case R_HEX_B22_PCREL:
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case R_HEX_PLT_B22_PCREL:
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case R_HEX_B22_PCREL_X:
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case R_HEX_B32_PCREL_X:
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return R_PLT_PC;
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case R_HEX_GOT_11_X:
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case R_HEX_GOT_16_X:
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case R_HEX_GOT_32_6_X:
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return R_HEXAGON_GOT;
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default:
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return R_ABS;
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}
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}
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static uint32_t findMaskR6(uint32_t Insn) {
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// There are (arguably too) many relocation masks for the DSP's
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// R_HEX_6_X type. The table below is used to select the correct mask
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// for the given instruction.
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struct InstructionMask {
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uint32_t CmpMask;
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uint32_t RelocMask;
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};
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static const InstructionMask R6[] = {
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{0x38000000, 0x0000201f}, {0x39000000, 0x0000201f},
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{0x3e000000, 0x00001f80}, {0x3f000000, 0x00001f80},
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{0x40000000, 0x000020f8}, {0x41000000, 0x000007e0},
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{0x42000000, 0x000020f8}, {0x43000000, 0x000007e0},
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{0x44000000, 0x000020f8}, {0x45000000, 0x000007e0},
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{0x46000000, 0x000020f8}, {0x47000000, 0x000007e0},
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{0x6a000000, 0x00001f80}, {0x7c000000, 0x001f2000},
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{0x9a000000, 0x00000f60}, {0x9b000000, 0x00000f60},
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{0x9c000000, 0x00000f60}, {0x9d000000, 0x00000f60},
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{0x9f000000, 0x001f0100}, {0xab000000, 0x0000003f},
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{0xad000000, 0x0000003f}, {0xaf000000, 0x00030078},
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{0xd7000000, 0x006020e0}, {0xd8000000, 0x006020e0},
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{0xdb000000, 0x006020e0}, {0xdf000000, 0x006020e0}};
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// Duplex forms have a fixed mask and parse bits 15:14 are always
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// zero. Non-duplex insns will always have at least one bit set in the
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// parse field.
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if ((0xC000 & Insn) == 0x0)
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return 0x03f00000;
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for (InstructionMask I : R6)
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if ((0xff000000 & Insn) == I.CmpMask)
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return I.RelocMask;
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error("unrecognized instruction for R_HEX_6 relocation: 0x" +
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utohexstr(Insn));
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return 0;
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}
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static uint32_t findMaskR8(uint32_t Insn) {
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if ((0xff000000 & Insn) == 0xde000000)
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return 0x00e020e8;
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if ((0xff000000 & Insn) == 0x3c000000)
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return 0x0000207f;
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return 0x00001fe0;
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}
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static uint32_t findMaskR11(uint32_t Insn) {
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if ((0xff000000 & Insn) == 0xa1000000)
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return 0x060020ff;
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return 0x06003fe0;
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}
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static uint32_t findMaskR16(uint32_t Insn) {
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if ((0xff000000 & Insn) == 0x48000000)
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return 0x061f20ff;
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if ((0xff000000 & Insn) == 0x49000000)
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return 0x061f3fe0;
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if ((0xff000000 & Insn) == 0x78000000)
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return 0x00df3fe0;
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if ((0xff000000 & Insn) == 0xb0000000)
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return 0x0fe03fe0;
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error("unrecognized instruction for R_HEX_16_X relocation: 0x" +
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utohexstr(Insn));
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return 0;
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}
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static void or32le(uint8_t *P, int32_t V) { write32le(P, read32le(P) | V); }
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void Hexagon::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
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switch (Type) {
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case R_HEX_NONE:
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break;
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case R_HEX_6_PCREL_X:
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case R_HEX_6_X:
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or32le(Loc, applyMask(findMaskR6(read32le(Loc)), Val));
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break;
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case R_HEX_8_X:
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or32le(Loc, applyMask(findMaskR8(read32le(Loc)), Val));
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break;
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case R_HEX_9_X:
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or32le(Loc, applyMask(0x00003fe0, Val & 0x3f));
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break;
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case R_HEX_10_X:
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or32le(Loc, applyMask(0x00203fe0, Val & 0x3f));
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break;
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case R_HEX_11_X:
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case R_HEX_GOT_11_X:
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or32le(Loc, applyMask(findMaskR11(read32le(Loc)), Val & 0x3f));
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break;
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case R_HEX_12_X:
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or32le(Loc, applyMask(0x000007e0, Val));
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break;
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case R_HEX_16_X: // These relocs only have 6 effective bits.
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case R_HEX_GOT_16_X:
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or32le(Loc, applyMask(findMaskR16(read32le(Loc)), Val & 0x3f));
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break;
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case R_HEX_32:
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case R_HEX_32_PCREL:
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or32le(Loc, Val);
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break;
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case R_HEX_32_6_X:
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case R_HEX_GOT_32_6_X:
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or32le(Loc, applyMask(0x0fff3fff, Val >> 6));
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break;
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case R_HEX_B9_PCREL:
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or32le(Loc, applyMask(0x003000fe, Val >> 2));
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break;
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case R_HEX_B9_PCREL_X:
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or32le(Loc, applyMask(0x003000fe, Val & 0x3f));
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break;
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case R_HEX_B13_PCREL:
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or32le(Loc, applyMask(0x00202ffe, Val >> 2));
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break;
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case R_HEX_B15_PCREL:
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or32le(Loc, applyMask(0x00df20fe, Val >> 2));
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break;
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case R_HEX_B15_PCREL_X:
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or32le(Loc, applyMask(0x00df20fe, Val & 0x3f));
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break;
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case R_HEX_B22_PCREL:
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case R_HEX_PLT_B22_PCREL:
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or32le(Loc, applyMask(0x1ff3ffe, Val >> 2));
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break;
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case R_HEX_B22_PCREL_X:
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or32le(Loc, applyMask(0x1ff3ffe, Val & 0x3f));
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break;
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case R_HEX_B32_PCREL_X:
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or32le(Loc, applyMask(0x0fff3fff, Val >> 6));
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break;
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case R_HEX_HI16:
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or32le(Loc, applyMask(0x00c03fff, Val >> 16));
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break;
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case R_HEX_LO16:
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or32le(Loc, applyMask(0x00c03fff, Val));
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break;
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default:
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error(getErrorLocation(Loc) + "unrecognized reloc " + toString(Type));
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break;
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}
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}
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void Hexagon::writePltHeader(uint8_t *Buf) const {
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const uint8_t PltData[] = {
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0x00, 0x40, 0x00, 0x00, // { immext (#0)
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0x1c, 0xc0, 0x49, 0x6a, // r28 = add (pc, ##GOT0@PCREL) } # @GOT0
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0x0e, 0x42, 0x9c, 0xe2, // { r14 -= add (r28, #16) # offset of GOTn
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0x4f, 0x40, 0x9c, 0x91, // r15 = memw (r28 + #8) # object ID at GOT2
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0x3c, 0xc0, 0x9c, 0x91, // r28 = memw (r28 + #4) }# dynamic link at GOT1
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0x0e, 0x42, 0x0e, 0x8c, // { r14 = asr (r14, #2) # index of PLTn
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0x00, 0xc0, 0x9c, 0x52, // jumpr r28 } # call dynamic linker
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0x0c, 0xdb, 0x00, 0x54, // trap0(#0xdb) # bring plt0 into 16byte alignment
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};
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memcpy(Buf, PltData, sizeof(PltData));
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// Offset from PLT0 to the GOT.
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uint64_t Off = In.GotPlt->getVA() - In.Plt->getVA();
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relocateOne(Buf, R_HEX_B32_PCREL_X, Off);
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relocateOne(Buf + 4, R_HEX_6_PCREL_X, Off);
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}
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void Hexagon::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
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uint64_t PltEntryAddr, int32_t Index,
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unsigned RelOff) const {
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const uint8_t Inst[] = {
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0x00, 0x40, 0x00, 0x00, // { immext (#0)
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0x0e, 0xc0, 0x49, 0x6a, // r14 = add (pc, ##GOTn@PCREL) }
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0x1c, 0xc0, 0x8e, 0x91, // r28 = memw (r14)
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0x00, 0xc0, 0x9c, 0x52, // jumpr r28
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};
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memcpy(Buf, Inst, sizeof(Inst));
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relocateOne(Buf, R_HEX_B32_PCREL_X, GotPltEntryAddr - PltEntryAddr);
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relocateOne(Buf + 4, R_HEX_6_PCREL_X, GotPltEntryAddr - PltEntryAddr);
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}
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TargetInfo *elf::getHexagonTargetInfo() {
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static Hexagon Target;
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return &Target;
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}
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