2946cd7010
to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
94 lines
2.7 KiB
C++
94 lines
2.7 KiB
C++
//===- MSP430.cpp ---------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// The MSP430 is a 16-bit microcontroller RISC architecture. The instruction set
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// has only 27 core instructions orthogonally augmented with a variety
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// of addressing modes for source and destination operands. Entire address space
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// of MSP430 is 64KB (the extended MSP430X architecture is not considered here).
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// A typical MSP430 MCU has several kilobytes of RAM and ROM, plenty
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// of peripherals and is generally optimized for a low power consumption.
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//
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//===----------------------------------------------------------------------===//
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#include "InputFiles.h"
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#include "Symbols.h"
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#include "Target.h"
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#include "lld/Common/ErrorHandler.h"
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#include "llvm/Object/ELF.h"
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#include "llvm/Support/Endian.h"
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using namespace llvm;
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using namespace llvm::object;
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using namespace llvm::support::endian;
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using namespace llvm::ELF;
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using namespace lld;
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using namespace lld::elf;
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namespace {
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class MSP430 final : public TargetInfo {
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public:
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MSP430();
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RelExpr getRelExpr(RelType Type, const Symbol &S,
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const uint8_t *Loc) const override;
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void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
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};
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} // namespace
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MSP430::MSP430() {
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// mov.b #0, r3
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TrapInstr = {0x43, 0x43, 0x43, 0x43};
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}
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RelExpr MSP430::getRelExpr(RelType Type, const Symbol &S,
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const uint8_t *Loc) const {
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switch (Type) {
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case R_MSP430_10_PCREL:
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case R_MSP430_16_PCREL:
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case R_MSP430_16_PCREL_BYTE:
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case R_MSP430_2X_PCREL:
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case R_MSP430_RL_PCREL:
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case R_MSP430_SYM_DIFF:
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return R_PC;
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default:
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return R_ABS;
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}
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}
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void MSP430::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
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switch (Type) {
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case R_MSP430_8:
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checkIntUInt(Loc, Val, 8, Type);
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*Loc = Val;
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break;
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case R_MSP430_16:
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case R_MSP430_16_PCREL:
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case R_MSP430_16_BYTE:
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case R_MSP430_16_PCREL_BYTE:
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checkIntUInt(Loc, Val, 16, Type);
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write16le(Loc, Val);
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break;
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case R_MSP430_32:
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checkIntUInt(Loc, Val, 32, Type);
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write32le(Loc, Val);
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break;
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case R_MSP430_10_PCREL: {
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int16_t Offset = ((int16_t)Val >> 1) - 1;
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checkInt(Loc, Offset, 10, Type);
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write16le(Loc, (read16le(Loc) & 0xFC00) | (Offset & 0x3FF));
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break;
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}
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default:
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error(getErrorLocation(Loc) + "unrecognized reloc " + toString(Type));
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}
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}
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TargetInfo *elf::getMSP430TargetInfo() {
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static MSP430 Target;
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return &Target;
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}
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