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llvm-project/llvm/test/MC/Disassembler/AMDGPU
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Dmitry Preobrazhensky 137976fae2 [AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit, private_base, private_limit, pops_exiting_wave_id 
See bug 39297: https://bugs.llvm.org/show_bug.cgi?id=39297

Reviewers: artem.tamazov, arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D59290

llvm-svn: 356561
2019-03-20 15:40:52 +00:00
..
aperture-regs.ll
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buf_fmt_packed_d16.txt
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buf_fmt_unpacked_d16.txt
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dl-insts.txt
AMDGPU: Fix v_dot{4, 8}* instruction encoding
2018-05-15 19:32:47 +00:00
dpp_gfx9.txt
[AMDGPU][MC][GFX9] Added v_screen_partition_4se_b32
2018-04-11 13:13:30 +00:00
dpp_vi.txt
[AMDGPU][MC][VI][GFX9] Added support of SDWA/DPP for v_cndmask_b32
2018-04-16 12:41:38 +00:00
ds_vi.txt
[AMDGPU][MC] Added ds_add_src2_f32
2018-03-28 16:21:56 +00:00
exp_vi.txt
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flat_gfx9.txt
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flat_vi.txt
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gfx8_dasm_all.txt
[AMDGPU][MC] Corrected default values for unused SDWA operands
2018-03-16 15:40:27 +00:00
gfx9_dasm_all.txt
[AMDGPU][MC] Corrected default values for unused SDWA operands
2018-03-16 15:40:27 +00:00
lds_direct_gfx9.txt
[AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32 and v_writelane_b32
2019-03-04 12:48:32 +00:00
lit.local.cfg
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literal16_vi.txt
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literal_gfx9.txt
[AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit, private_base, private_limit, pops_exiting_wave_id
2019-03-20 15:40:52 +00:00
literal_vi.txt
[AMDGPU][MC][GFX8+][DISASSEMBLER] Corrected 1/2pi value for 64-bit operands
2019-01-18 15:17:17 +00:00
mac.txt
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mad_mix.txt
AMDGPU: Add Vega12 and Vega20
2018-04-30 19:08:16 +00:00
mimg_vi.txt
[AMDGPU][MC] Added PCK variants of image load/store instructions
2018-03-28 15:44:16 +00:00
mov.txt
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mtbuf_vi.txt
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mubuf_gfx9.txt
[AMDGPU][MC][GFX9] Added buffer_*_format_d16_hi_x
2018-03-28 14:53:13 +00:00
mubuf_vi.txt
[AMDGPU][MC][GFX8] Added BUFFER_STORE_LDS_DWORD Instruction
2018-03-12 17:29:24 +00:00
nop.txt
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sdwa_gfx9.txt
[AMDGPU][MC][VI][GFX9] Added support of SDWA/DPP for v_cndmask_b32
2018-04-16 12:41:38 +00:00
sdwa_vi.txt
[AMDGPU][MC][VI][GFX9] Added support of SDWA/DPP for v_cndmask_b32
2018-04-16 12:41:38 +00:00
si-support.txt
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smem_gfx9.txt
[AMDGPU][MC][GFX9] Added s_dcache_discard* instructions
2018-04-06 15:08:42 +00:00
smem_vi.txt
[AMDGPU][MC][VI][GFX9] Added s_atc_probe* instructions
2018-04-06 15:48:39 +00:00
smrd_vi.txt
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sop1_gfx9.txt
[AMDGPU][MC][GFX9] Added instructions *saveexec*, *wrexec* and *bitreplicate*
2018-04-06 16:35:11 +00:00
sop1_vi.txt
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sop2_gfx9.txt
[AMDGPU][MC][GFX9] Added instructions s_mul_hi_*32, s_lshl*_add_u32
2018-04-09 13:10:33 +00:00
sop2_vi.txt
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sopc_vi.txt
[AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of instructions s_set_gpr_idx_on and s_set_gpr_idx_mode
2019-02-27 13:12:12 +00:00
sopk_gfx9.txt
[AMDGPU][MC][GFX9] Added s_call_b64
2018-04-06 18:24:49 +00:00
sopk_vi.txt
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sopp_vi.txt
[AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of instructions s_set_gpr_idx_on and s_set_gpr_idx_mode
2019-02-27 13:12:12 +00:00
trap_gfx9.txt
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trap_vi.txt
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vintrp.txt
[AMDGPU][MC][GFX8][GFX9][DISASSEMBLER] Added "_e32" suffix to 32-bit VINTRP opcodes
2018-03-16 16:38:04 +00:00
vop1_gfx9.txt
[AMDGPU][MC][GFX9] Added v_screen_partition_4se_b32
2018-04-11 13:13:30 +00:00
vop1_vi.txt
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vop1.txt
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vop2_vi.txt
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vop3_gfx9.txt
[AMDGPU] Asm/disasm clamp modifier on vop3 int arithmetic
2019-03-18 19:35:44 +00:00
vop3_vi.txt
[AMDGPU] Asm/disasm clamp modifier on vop3 int arithmetic
2019-03-18 19:35:44 +00:00
vopc_vi.txt
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