435897b41d
A new tableGen backend gen-dxil-enum is added to generate enum for DXIL operation and operation class. A new file "DXILConstants.inc" will be generated when build DirectX target which include the enums. More tableGen backends will be added to replace manually written table in DirectX backend. The unused fields in dxil_inst will be used in future PR. Reviewed By: bogner Differential Revision: https://reviews.llvm.org/D125435
308 lines
9.9 KiB
C++
308 lines
9.9 KiB
C++
//===- TableGen.cpp - Top-Level TableGen implementation for LLVM ----------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the main function for LLVM's TableGen.
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//
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//===----------------------------------------------------------------------===//
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#include "TableGenBackends.h" // Declares all backends.
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/InitLLVM.h"
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#include "llvm/TableGen/Main.h"
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#include "llvm/TableGen/Record.h"
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#include "llvm/TableGen/SetTheory.h"
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using namespace llvm;
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enum ActionType {
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PrintRecords,
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PrintDetailedRecords,
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NullBackend,
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DumpJSON,
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GenEmitter,
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GenRegisterInfo,
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GenInstrInfo,
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GenInstrDocs,
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GenAsmWriter,
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GenAsmMatcher,
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GenDisassembler,
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GenPseudoLowering,
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GenCompressInst,
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GenCallingConv,
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GenDAGISel,
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GenDFAPacketizer,
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GenFastISel,
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GenSubtarget,
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GenIntrinsicEnums,
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GenIntrinsicImpl,
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PrintEnums,
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PrintSets,
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GenOptParserDefs,
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GenOptRST,
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GenCTags,
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GenAttributes,
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GenSearchableTables,
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GenGlobalISel,
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GenGICombiner,
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GenX86EVEX2VEXTables,
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GenX86FoldTables,
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GenX86MnemonicTables,
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GenRegisterBank,
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GenExegesis,
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GenAutomata,
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GenDirectivesEnumDecl,
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GenDirectivesEnumImpl,
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GenDXILOperation,
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};
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namespace llvm {
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cl::opt<bool> EmitLongStrLiterals(
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"long-string-literals",
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cl::desc("when emitting large string tables, prefer string literals over "
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"comma-separated char literals. This can be a readability and "
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"compile-time performance win, but upsets some compilers"),
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cl::Hidden, cl::init(true));
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} // end namespace llvm
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namespace {
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cl::opt<ActionType> Action(
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cl::desc("Action to perform:"),
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cl::values(
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clEnumValN(PrintRecords, "print-records",
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"Print all records to stdout (default)"),
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clEnumValN(PrintDetailedRecords, "print-detailed-records",
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"Print full details of all records to stdout"),
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clEnumValN(NullBackend, "null-backend",
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"Do nothing after parsing (useful for timing)"),
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clEnumValN(DumpJSON, "dump-json",
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"Dump all records as machine-readable JSON"),
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clEnumValN(GenEmitter, "gen-emitter", "Generate machine code emitter"),
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clEnumValN(GenRegisterInfo, "gen-register-info",
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"Generate registers and register classes info"),
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clEnumValN(GenInstrInfo, "gen-instr-info",
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"Generate instruction descriptions"),
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clEnumValN(GenInstrDocs, "gen-instr-docs",
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"Generate instruction documentation"),
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clEnumValN(GenCallingConv, "gen-callingconv",
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"Generate calling convention descriptions"),
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clEnumValN(GenAsmWriter, "gen-asm-writer", "Generate assembly writer"),
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clEnumValN(GenDisassembler, "gen-disassembler",
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"Generate disassembler"),
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clEnumValN(GenPseudoLowering, "gen-pseudo-lowering",
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"Generate pseudo instruction lowering"),
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clEnumValN(GenCompressInst, "gen-compress-inst-emitter",
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"Generate RISCV compressed instructions."),
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clEnumValN(GenAsmMatcher, "gen-asm-matcher",
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"Generate assembly instruction matcher"),
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clEnumValN(GenDAGISel, "gen-dag-isel",
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"Generate a DAG instruction selector"),
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clEnumValN(GenDFAPacketizer, "gen-dfa-packetizer",
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"Generate DFA Packetizer for VLIW targets"),
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clEnumValN(GenFastISel, "gen-fast-isel",
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"Generate a \"fast\" instruction selector"),
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clEnumValN(GenSubtarget, "gen-subtarget",
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"Generate subtarget enumerations"),
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clEnumValN(GenIntrinsicEnums, "gen-intrinsic-enums",
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"Generate intrinsic enums"),
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clEnumValN(GenIntrinsicImpl, "gen-intrinsic-impl",
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"Generate intrinsic information"),
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clEnumValN(PrintEnums, "print-enums", "Print enum values for a class"),
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clEnumValN(PrintSets, "print-sets",
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"Print expanded sets for testing DAG exprs"),
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clEnumValN(GenOptParserDefs, "gen-opt-parser-defs",
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"Generate option definitions"),
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clEnumValN(GenOptRST, "gen-opt-rst", "Generate option RST"),
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clEnumValN(GenCTags, "gen-ctags", "Generate ctags-compatible index"),
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clEnumValN(GenAttributes, "gen-attrs", "Generate attributes"),
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clEnumValN(GenSearchableTables, "gen-searchable-tables",
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"Generate generic binary-searchable table"),
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clEnumValN(GenGlobalISel, "gen-global-isel",
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"Generate GlobalISel selector"),
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clEnumValN(GenGICombiner, "gen-global-isel-combiner",
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"Generate GlobalISel combiner"),
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clEnumValN(GenX86EVEX2VEXTables, "gen-x86-EVEX2VEX-tables",
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"Generate X86 EVEX to VEX compress tables"),
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clEnumValN(GenX86FoldTables, "gen-x86-fold-tables",
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"Generate X86 fold tables"),
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clEnumValN(GenX86MnemonicTables, "gen-x86-mnemonic-tables",
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"Generate X86 mnemonic tables"),
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clEnumValN(GenRegisterBank, "gen-register-bank",
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"Generate registers bank descriptions"),
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clEnumValN(GenExegesis, "gen-exegesis",
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"Generate llvm-exegesis tables"),
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clEnumValN(GenAutomata, "gen-automata", "Generate generic automata"),
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clEnumValN(GenDirectivesEnumDecl, "gen-directive-decl",
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"Generate directive related declaration code (header file)"),
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clEnumValN(GenDirectivesEnumImpl, "gen-directive-impl",
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"Generate directive related implementation code"),
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clEnumValN(GenDXILOperation, "gen-dxil-operation",
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"Generate DXIL operation information")));
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cl::OptionCategory PrintEnumsCat("Options for -print-enums");
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cl::opt<std::string> Class("class", cl::desc("Print Enum list for this class"),
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cl::value_desc("class name"),
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cl::cat(PrintEnumsCat));
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bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) {
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switch (Action) {
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case PrintRecords:
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OS << Records; // No argument, dump all contents
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break;
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case PrintDetailedRecords:
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EmitDetailedRecords(Records, OS);
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break;
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case NullBackend: // No backend at all.
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break;
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case DumpJSON:
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EmitJSON(Records, OS);
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break;
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case GenEmitter:
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EmitCodeEmitter(Records, OS);
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break;
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case GenRegisterInfo:
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EmitRegisterInfo(Records, OS);
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break;
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case GenInstrInfo:
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EmitInstrInfo(Records, OS);
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break;
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case GenInstrDocs:
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EmitInstrDocs(Records, OS);
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break;
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case GenCallingConv:
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EmitCallingConv(Records, OS);
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break;
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case GenAsmWriter:
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EmitAsmWriter(Records, OS);
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break;
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case GenAsmMatcher:
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EmitAsmMatcher(Records, OS);
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break;
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case GenDisassembler:
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EmitDisassembler(Records, OS);
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break;
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case GenPseudoLowering:
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EmitPseudoLowering(Records, OS);
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break;
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case GenCompressInst:
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EmitCompressInst(Records, OS);
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break;
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case GenDAGISel:
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EmitDAGISel(Records, OS);
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break;
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case GenDFAPacketizer:
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EmitDFAPacketizer(Records, OS);
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break;
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case GenFastISel:
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EmitFastISel(Records, OS);
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break;
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case GenSubtarget:
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EmitSubtarget(Records, OS);
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break;
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case GenIntrinsicEnums:
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EmitIntrinsicEnums(Records, OS);
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break;
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case GenIntrinsicImpl:
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EmitIntrinsicImpl(Records, OS);
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break;
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case GenOptParserDefs:
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EmitOptParser(Records, OS);
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break;
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case GenOptRST:
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EmitOptRST(Records, OS);
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break;
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case PrintEnums:
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{
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for (Record *Rec : Records.getAllDerivedDefinitions(Class))
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OS << Rec->getName() << ", ";
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OS << "\n";
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break;
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}
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case PrintSets:
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{
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SetTheory Sets;
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Sets.addFieldExpander("Set", "Elements");
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for (Record *Rec : Records.getAllDerivedDefinitions("Set")) {
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OS << Rec->getName() << " = [";
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const std::vector<Record*> *Elts = Sets.expand(Rec);
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assert(Elts && "Couldn't expand Set instance");
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for (Record *Elt : *Elts)
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OS << ' ' << Elt->getName();
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OS << " ]\n";
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}
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break;
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}
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case GenCTags:
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EmitCTags(Records, OS);
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break;
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case GenAttributes:
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EmitAttributes(Records, OS);
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break;
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case GenSearchableTables:
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EmitSearchableTables(Records, OS);
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break;
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case GenGlobalISel:
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EmitGlobalISel(Records, OS);
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break;
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case GenGICombiner:
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EmitGICombiner(Records, OS);
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break;
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case GenRegisterBank:
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EmitRegisterBank(Records, OS);
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break;
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case GenX86EVEX2VEXTables:
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EmitX86EVEX2VEXTables(Records, OS);
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break;
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case GenX86MnemonicTables:
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EmitX86MnemonicTables(Records, OS);
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break;
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case GenX86FoldTables:
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EmitX86FoldTables(Records, OS);
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break;
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case GenExegesis:
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EmitExegesis(Records, OS);
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break;
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case GenAutomata:
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EmitAutomata(Records, OS);
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break;
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case GenDirectivesEnumDecl:
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EmitDirectivesDecl(Records, OS);
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break;
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case GenDirectivesEnumImpl:
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EmitDirectivesImpl(Records, OS);
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break;
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case GenDXILOperation:
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EmitDXILOperation(Records, OS);
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break;
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}
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return false;
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}
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}
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int main(int argc, char **argv) {
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InitLLVM X(argc, argv);
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cl::ParseCommandLineOptions(argc, argv);
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return TableGenMain(argv[0], &LLVMTableGenMain);
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}
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#ifndef __has_feature
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#define __has_feature(x) 0
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#endif
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#if __has_feature(address_sanitizer) || \
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(defined(__SANITIZE_ADDRESS__) && defined(__GNUC__)) || \
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__has_feature(leak_sanitizer)
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#include <sanitizer/lsan_interface.h>
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// Disable LeakSanitizer for this binary as it has too many leaks that are not
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// very interesting to fix. See compiler-rt/include/sanitizer/lsan_interface.h .
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LLVM_ATTRIBUTE_USED int __lsan_is_turned_off() { return 1; }
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#endif
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