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llvm-project/llvm/test/CodeGen
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Pierre van Houtryve aacebaeab5
[AMDGPU] Do not promote uniform i16 operations to i32 in CGP (#140208) 
For the majority of cases, this is a neutral or positive change.
There are even testcases that greatly benefit from it, but some regressions are possible.
There is #140040 for GlobalISel that'd need to be fixed but it's only a one instruction regression and I think it can be fixed later.

Solves #64591
2025-05-16 10:31:03 +02:00
..
AArch64
[AArch64] Restrict .variant_pcs directive to ELF targets (#138924)
2025-05-16 09:21:55 +01:00
AMDGPU
[AMDGPU] Do not promote uniform i16 operations to i32 in CGP (#140208)
2025-05-16 10:31:03 +02:00
ARC
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ARM
CodeGen: Add ISD::AssertNoFPClass (#138839)
2025-05-15 16:05:15 +08:00
AVR
[clang][AVR] Improve compatibility of inline assembly with avr-gcc (#136534)
2025-04-23 18:42:07 +08:00
BPF
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CSKY
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DirectX
[DirectX] Set whole-module flags prior to evaluating per-function flags (#139967)
2025-05-15 13:43:29 -07:00
Generic
[LLVM][VecLib] Refactor LIBMVEC integration to be target neutral. (#138262)
2025-05-07 11:05:25 +01:00
Hexagon
Hexagon: sfmax/sfmin instructions are IEEE754-2019 (#139056)
2025-05-14 11:55:11 +08:00
Inputs
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Lanai
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LoongArch
LoongArch: Set FMAXNUM and FMINNUM as Legal (#139010)
2025-05-09 16:26:08 +08:00
M68k
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Mips
[COFF][Mips] Set PrivateGlobalPrefix to .L (#140033)
2025-05-16 11:22:44 +08:00
MIR
[NVPTX] Vectorize and lower 256-bit global loads/stores for sm_100+/ptx88+ (#139292)
2025-05-13 13:36:09 -07:00
MLRegAlloc
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MSP430
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NVPTX
[DAGCombiner] Fold pattern for srl-shl-zext (REAPPLIED) (#140038)
2025-05-15 18:04:33 +01:00
PowerPC
[PowerPC] catch v2i64 shift left by 1 is add case (#138772)
2025-05-13 11:26:46 -04:00
RISCV
[RISCV] Add SEXT_INREG patterns for Xqcibm ext instruction (#140192)
2025-05-16 12:49:14 +05:30
SPARC
[SPARC] Use op-then-neg instructions when we have VIS3 (#138603)
2025-05-06 05:36:29 +07:00
SPIRV
[SPIR-V] Fix LIT tests, improve ICmpInst's type inference (#139726)
2025-05-15 10:46:54 +02:00
SystemZ
[MCP] Disable BackwardCopyPropagateBlock for copies with implicit registers. (#137687)
2025-05-08 16:27:08 -07:00
Thumb
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Thumb2
[DAGCombiner] Eliminate fp casts if we have the right fast math flags (#131345)
2025-04-28 11:21:51 +01:00
VE
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
WebAssembly
[WebAssembly] Fix trunc in FastISel (#138479)
2025-05-06 14:16:35 -07:00
WinCFGuard
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WinEH
[WinEH] Fix asm in catchpad being turned into unreachable (#138392)
2025-05-08 21:46:51 +02:00
X86
[X86] avgfloors.ll - regenerate test checks for TERNLOG comments
2025-05-15 10:13:50 +01:00
XCore
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Xtensa
[Xtensa] Implement Xtensa Mul and Div Options. (#132157)
2025-04-18 20:22:03 +03:00