Derek Schuff abc8aac6d2

[WebAssembly] Check intrinsic argument count before Any/All combine (#162163) ...

This code is activated on all INTRINSIC_WO_CHAIN but only handles
a selection. However it was trying to read the arguments before
checking which intrinsic it was handling. This fails for intrinsics
that have no arguments.

2025-10-07 23:52:25 +00:00

..

AArch64

[AArch64][GlobalISel] Prevented llvm.aarch64.neon.saddlp/uaddlp fallback (#160883)

2025-10-07 21:51:57 +01:00

AMDGPU

[AMDGPU] Use true16 loads with +real-true16 and sram-ecc (#161256)

2025-10-07 09:31:07 -07:00

ARC

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ARM

[ARM] Add mayRaiseFPException to appropriate instructions and mark all instructions that read/write fpscr rounding bits as doing so (#160698)

2025-10-07 22:19:53 +01:00

AVR

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BPF

[BPF] Handle certain mem intrinsic functions with addr-space arguments (#160025)

2025-10-07 16:34:06 -07:00

CSKY

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DirectX

[DirectX] Fix Flags validation to prevent casting into enum (#161587)

2025-10-06 17:21:28 -04:00

Generic

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Hexagon

[Hexagon] Support lowering of setuo & seto for vector types in Hexagon (#158740)

2025-10-03 13:44:35 -05:00

Inputs

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Lanai

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LoongArch

[LoongArch] Custom legalize vector_shuffle to xvinsve0.{w/d} when possible (#161156)

2025-09-30 01:49:19 +00:00

M68k

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Mips

PeepholeOpt: Fix losing subregister indexes on full copies (#161310)

2025-10-02 13:36:47 +09:00

MIR

[MIR][NFC] Build fix after 1132e82 (#160273)

2025-09-23 15:58:42 +03:00

MIR2Vec

[IR2Vec] Initial infrastructure for MIR2Vec (#161463)

2025-10-07 13:45:20 -07:00

MLRegAlloc

Revert "Speculative buildbot fix after ca2e8f"

2025-09-23 16:17:09 -07:00

MSP430

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NVPTX

[NVPTX] Added more MMA intrinsics for F8F6F4 and FP64 types. (#156040)

2025-10-06 13:51:49 +05:30

PowerPC

[PowerPC] recognize vmnsub in older ppc versions (#155465)

2025-10-06 12:40:57 -04:00

RISCV

[RISCV] Bump Zalasr version to 0.9. (#162329)

2025-10-07 15:47:21 -07:00

SPARC

[SPARC] Prevent meta instructions from being inserted into delay slots (#161111)

2025-10-03 19:25:08 +07:00

SPIRV

[SPIRV] Implement LLVM IR and backend for typed buffer counters (#161425)

2025-10-06 06:49:42 -04:00

SystemZ

[RegAlloc] Remove default restriction on non-trivial rematerialization (#159211)

2025-10-04 22:50:44 +00:00

Thumb

[clang][driver][arm][macho] Default to -mframe-pointer=non-leaf. (#154216)

2025-09-09 18:39:26 +00:00

Thumb2

[ARM] Add mayRaiseFPException to appropriate instructions and mark all instructions that read/write fpscr rounding bits as doing so (#160698)

2025-10-07 22:19:53 +01:00

VE

[LLVM][CodeGen][SVE] Remove failure cases when widening vector load/store ops. (#160515)

2025-10-02 12:24:23 +01:00

WebAssembly

[WebAssembly] Check intrinsic argument count before Any/All combine (#162163)

2025-10-07 23:52:25 +00:00

WinCFGuard

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WinEH

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X86

[X86] x86-shrink-wrap-unwind.ll - regenerate test checks (#162061)

2025-10-06 10:44:09 +00:00

XCore

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Xtensa

[Xtensa] Fix lowering FP compare operations. (#156740)

2025-09-08 20:42:52 +03:00