llvm-project

History

[AArch64] Fix big endian shuffle vector miscompile (#68673 )

Fixes https://github.com/llvm/llvm-project/issues/65884

2023-11-20 10:24:20 +00:00

AArch64

[AArch64] Fix big endian shuffle vector miscompile (#68673 )

2023-11-20 10:24:20 +00:00

AMDGPU

[MachineLICM][AArch64] Hoist COPY instructions with other uses in the loop (#71403 )

2023-11-20 10:01:04 +00:00

ARC

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ARM

[ARM][FPEnv] Lowering of fpenv intrinsics

2023-11-20 15:08:25 +07:00

AVR

Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038 )"

2023-10-09 12:31:32 +01:00

BPF

[SCEV] Extend isImpliedCondOperandsViaRanges to independent predicates (#71110 )

2023-11-07 07:25:47 -08:00

CSKY

[CSKY,test] Update switch.ll

2023-10-31 15:47:05 -07:00

DirectX

[DirectX] Update test after opt learned to infer datalayout (#70726 )

2023-10-30 14:04:15 -07:00

Generic

[CodeGen][AArch64] Set min jump table entries to 13 for AArch64 targets (#71166 )

2023-11-14 13:00:28 +00:00

Hexagon

[MachineLICM] Allow hoisting loads from invariant address (#70796 )

2023-11-16 11:12:10 +00:00

Inputs

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Lanai

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LoongArch

[LoongArch] Improve codegen for atomic cmpxchg ops (#69339 )

2023-10-19 09:21:51 +08:00

M68k

[GlobalISel][M68k] Update test after 373c343

2023-11-02 03:32:47 +01:00

Mips

[MachineLICM] Allow hoisting loads from invariant address (#70796 )

2023-11-16 11:12:10 +00:00

MIR

[X86] Support EGPR (R16-R31) for APX (#70958 )

2023-11-09 23:39:40 +08:00

MLRegAlloc

Fix error message when regalloc eviction advisor analysis could not be created (#72165 )

2023-11-14 11:17:17 -08:00

MSP430

Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038 )"

2023-10-09 12:31:32 +01:00

NVPTX

[NVPTX] Expand EXTLOAD for v8f16 and v8bf16 (#72672 )

2023-11-17 09:51:50 -08:00

PowerPC

[PowerPC] Use MIR test so that it's not affected by instruction selection. NFC.

2023-11-20 09:51:12 +00:00

RISCV

[RISCV] postpone removal in initundef pass (#71661 )

2023-11-20 11:44:27 +08:00

SPARC

[Sparc] Remove duplicate ALU and SETHI instructions (NFCI) (#66851 )

2023-10-10 20:34:20 +03:00

SPIRV

[SPIR-V] Emit proper pointer type for OpenCL kernel arguments (#67726 )

2023-10-18 20:51:53 -07:00

SystemZ

[SystemZ] Enable AtomicExpand pass (#70398 )

2023-10-31 09:51:06 +01:00

Thumb

Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038 )"

2023-10-09 12:31:32 +01:00

Thumb2

[DAG] foldABSToABD - add support for abs(sub(sign_extend_inreg(),sign_extend_inreg())) patterns

2023-11-15 15:49:30 +00:00

BlockFrequencyInfoImpl: Avoid big numbers, increase precision for small spreads

2023-10-24 20:27:39 -07:00

WebAssembly

[IR] Remove zext and sext constant expressions (#71040 )

2023-11-03 10:46:07 +01:00

WinCFGuard

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WinEH

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X86

[MachineLICM][AArch64] Hoist COPY instructions with other uses in the loop (#71403 )

2023-11-20 10:01:04 +00:00

XCore

[RegScavenger] Simplify state tracking for backwards scavenging (#71202 )

2023-11-08 09:49:07 +00:00