fc0653f31c
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
42 lines
1.4 KiB
LLVM
42 lines
1.4 KiB
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
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; RUN: llc -mtriple=amdgcn -mcpu=bonaire < %s 2>&1 | FileCheck -enable-var-scope -check-prefix=GCN %s
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; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s 2>&1 | FileCheck -enable-var-scope -check-prefix=GCN %s
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; GCN-LABEL: {{^}}s_input_output_i16:
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; GCN: s_mov_b32 s[[REG:[0-9]+]], -1
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; GCN: ; use s[[REG]]
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define amdgpu_kernel void @s_input_output_i16() #0 {
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%v = tail call i16 asm sideeffect "s_mov_b32 $0, -1", "=s"()
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tail call void asm sideeffect "; use $0", "s"(i16 %v) #0
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ret void
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}
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; GCN-LABEL: {{^}}v_input_output_i16:
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; GCN: v_mov_b32 v[[REG:[0-9]+]], -1
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; GCN: ; use v[[REG]]
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define amdgpu_kernel void @v_input_output_i16() #0 {
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%v = tail call i16 asm sideeffect "v_mov_b32 $0, -1", "=v"() #0
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tail call void asm sideeffect "; use $0", "v"(i16 %v)
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ret void
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}
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; GCN-LABEL: {{^}}s_input_output_f16:
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; GCN: s_mov_b32 s[[REG:[0-9]+]], -1
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; GCN: ; use s[[REG]]
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define amdgpu_kernel void @s_input_output_f16() #0 {
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%v = tail call half asm sideeffect "s_mov_b32 $0, -1", "=s"() #0
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tail call void asm sideeffect "; use $0", "s"(half %v)
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ret void
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}
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; GCN-LABEL: {{^}}v_input_output_f16:
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; GCN: v_mov_b32 v[[REG:[0-9]+]], -1
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; GCN: ; use v[[REG]]
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define amdgpu_kernel void @v_input_output_f16() #0 {
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%v = tail call half asm sideeffect "v_mov_b32 $0, -1", "=v"() #0
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tail call void asm sideeffect "; use $0", "v"(half %v)
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ret void
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}
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attributes #0 = { nounwind }
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