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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
99 lines
3.2 KiB
C++
99 lines
3.2 KiB
C++
//===-- MipsAsmBackend.h - Mips Asm Backend ------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the MipsAsmBackend class.
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//
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//===----------------------------------------------------------------------===//
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//
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#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H
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#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H
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#include "MCTargetDesc/MipsFixupKinds.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/MC/MCAsmBackend.h"
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namespace llvm {
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class MCAssembler;
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struct MCFixupKindInfo;
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class MCObjectWriter;
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class MCRegisterInfo;
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class MCSymbolELF;
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class Target;
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class MipsAsmBackend : public MCAsmBackend {
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Triple TheTriple;
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bool IsN32;
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public:
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MipsAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT,
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StringRef CPU, bool N32)
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: MCAsmBackend(TT.isLittleEndian() ? support::little : support::big),
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TheTriple(TT), IsN32(N32) {}
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std::unique_ptr<MCObjectTargetWriter>
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createObjectTargetWriter() const override;
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void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
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const MCValue &Target, MutableArrayRef<char> Data,
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uint64_t Value, bool IsResolved,
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const MCSubtargetInfo *STI) const override;
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Optional<MCFixupKind> getFixupKind(StringRef Name) const override;
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const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
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unsigned getNumFixupKinds() const override {
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return Mips::NumTargetFixupKinds;
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}
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/// @name Target Relaxation Interfaces
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/// @{
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/// MayNeedRelaxation - Check whether the given instruction may need
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/// relaxation.
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///
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/// \param Inst - The instruction to test.
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bool mayNeedRelaxation(const MCInst &Inst,
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const MCSubtargetInfo &STI) const override {
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return false;
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}
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/// fixupNeedsRelaxation - Target specific predicate for whether a given
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/// fixup requires the associated instruction to be relaxed.
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bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
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const MCRelaxableFragment *DF,
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const MCAsmLayout &Layout) const override {
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// FIXME.
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llvm_unreachable("RelaxInstruction() unimplemented");
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return false;
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}
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/// RelaxInstruction - Relax the instruction in the given fragment
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/// to the next wider instruction.
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///
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/// \param Inst - The instruction to relax, which may be the same
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/// as the output.
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/// \param [out] Res On return, the relaxed instruction.
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void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
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MCInst &Res) const override {}
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/// @}
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bool writeNopData(raw_ostream &OS, uint64_t Count) const override;
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bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
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const MCValue &Target) override;
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bool isMicroMips(const MCSymbol *Sym) const override;
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}; // class MipsAsmBackend
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} // namespace
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#endif
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