Antonio Frighetto 13faa81916 [TypePromotion] Do not zero-extend getelementptr indexes since signed ...

A miscompilation issue has been addressed with improved handling.

Fixes: https://github.com/llvm/llvm-project/issues/133928.

Alive2: https://alive2.llvm.org/ce/z/gcMNvS.

2025-04-05 16:49:05 +02:00

..

AArch64

[TypePromotion] Do not zero-extend getelementptr indexes since signed

2025-04-05 16:49:05 +02:00

AMDGPU

AMDGPU: Add round-to-odd rounding during f64 to bf16 conversion (#133995)

2025-04-04 21:19:43 -07:00

ARC

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ARM

Remove iOS 5 check for tailcalls on ARM (#133354)

2025-04-04 16:02:39 -07:00

AVR

[AVR] Fix a bug in selection of ANY_EXTEND (#132398)

2025-03-26 15:15:40 +01:00

BPF

[BPF] Fix BitCast Assertion with NonZero AddrSpace (#130722)

2025-03-11 11:23:53 -07:00

CSKY

[CSKY] Update fp16-promote.ll test (NFC)

2025-03-05 12:42:32 +01:00

DirectX

[HLSL] Implement dot2add intrinsic (#131237)

2025-04-03 16:23:09 -06:00

Generic

[DebugInfo][RemoveDIs] Remove debug-intrinsic printing cmdline options (#131855)

2025-04-01 14:27:11 +01:00

Hexagon

[EarlyIfConverter] Fix reg killed twice after early-if-predicator and ifcvt (#133554)

2025-04-01 12:06:30 +02:00

Inputs

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Lanai

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LoongArch

[LoongArch] Pre-commit tests for vector absolute difference (#132898)

2025-04-03 09:19:59 +08:00

M68k

Rename ExpandLargeFpConvertPass to ExpandFpPass (#131128)

2025-03-14 13:11:45 +01:00

Mips

[MC] Don't print () around $ names

2025-03-30 16:38:16 -07:00

MIR

[Verifier] Require that dbg.declare variable is a ptr (#134355)

2025-04-04 15:34:45 +02:00

MLRegAlloc

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MSP430

[SelectionDAG] Utilizing target hook convertSelectOfConstantsToMath for SelectwithConstant (#127599)

2025-02-25 20:32:24 +05:30

NVPTX

[DAGCombiner] Attempt to fold 'add' nodes to funnel-shift or rotate (#125612)

2025-04-04 15:39:24 -07:00

PowerPC

[PowerPC] Fix instruction name for dmr insert (#134301)

2025-04-04 15:56:30 -04:00

RISCV

[RISCV] Undo unprofitable zext of icmp combine (#134306)

2025-04-04 19:05:59 +01:00

SPARC

[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)

2025-02-19 10:16:57 +01:00

SPIRV

[SPIRV] Add spirv.VulkanBuffer types to the backend (#133475)

2025-04-03 09:44:07 -04:00

SystemZ

[SystemZ, DebugInfo] Instrument SystemZ backend passes for Instr-Ref DebugInfo (#133061)

2025-03-31 19:30:06 +02:00

Thumb

[RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (#120557)

2025-03-03 11:06:15 +05:30

Thumb2

[SelectionDAG] Use SimplifyDemandedBits from SimplifyDemandedVectorElts Bitcast. (#133717)

2025-04-03 11:14:08 +01:00

VE

[NVPTX] Legalize ctpop and ctlz in operation legalization (#130668)

2025-03-12 09:28:40 -07:00

WebAssembly

[SelectionDAG] Use SimplifyDemandedBits from SimplifyDemandedVectorElts Bitcast. (#133717)

2025-04-03 11:14:08 +01:00

WinCFGuard

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WinEH

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X86

[DAGCombiner] Attempt to fold 'add' nodes to funnel-shift or rotate (#125612)

2025-04-04 15:39:24 -07:00

XCore

Reland: [MC] output inlined-at debug info (#106230) (#130306)

2025-03-11 09:43:14 -04:00

Xtensa

[Xtensa] Implement windowed register call ABI. (#130001)

2025-03-31 22:24:59 +03:00