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llvm-project/llvm/test/CodeGen/Thumb2/LowOverheadLoops
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Sam Parker 94b195ff12 [ARM][LowOverheadLoops] Add horizontal reduction support 
Add a bit more logic into the 'FalseLaneZeros' tracking to enable
horizontal reductions and also make the VADDV variants
validForTailPredication.

Differential Revision: https://reviews.llvm.org/D76708
2020-03-30 09:55:41 +01:00
..
add_reduce.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
basic-tail-pred.ll
[ARM][MVE] Tail-Predication: recognise (again) active lanes IR pattern
2020-02-11 15:18:18 +00:00
branch-targets.ll
[ARM][LowOverheadLoops] Use subs during revert.
2019-09-23 08:57:50 +00:00
clear-maskedinsts.ll
[ARM][MVE] Clear MaskedInsts vector
2020-01-22 04:27:36 -05:00
cmplx_cong.mir
[RDA] Track implicit-defs
2020-02-28 11:14:42 +00:00
cond-mov.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
cond-vector-reduce-mve-codegen.ll
[DAGCombine] Skip PostInc combine with later users
2020-03-23 08:39:53 +00:00
ctlz-non-zeros.mir
[NFC][ARM] Add missing tests
2020-03-24 11:08:01 +00:00
disjoint-vcmp.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
dont-ignore-vctp.mir
[RDA] Track implicit-defs
2020-02-28 11:14:42 +00:00
dont-remove-loop-update2.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
dont-remove-loop-update.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
end-positive-offset.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
extending-loads.ll
[DAGCombine] Skip PostInc combine with later users
2020-03-23 08:39:53 +00:00
extract-element.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
fast-fp-loops.ll
[AsmPrinter] Print FP constant in hexadecimal form instead
2020-02-07 16:00:55 +00:00
incorrect-sub-8.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
incorrect-sub-16.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
incorrect-sub-32.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
inloop-vpnot-1.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
inloop-vpnot-2.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
inloop-vpnot-3.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
inloop-vpsel-1.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
inloop-vpsel-2.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
invariant-qreg.mir
[ARM][MVE] Validate tail predication values
2020-03-10 09:59:01 +00:00
it-block-chain.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
it-block-itercount.mir
[RDA][ARM] collectKilledOperands across multiple blocks
2020-03-03 15:23:05 +00:00
it-block-mov.mir
[RDA][ARM] collectKilledOperands across multiple blocks
2020-03-03 15:23:05 +00:00
it-block-random.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
livereg-no-loop-def.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
loop-dec-copy-chain.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
loop-dec-copy-prev-iteration.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
loop-dec-liveout.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
loop-guards.ll
[ARM][LowOverheadLoops] Update liveness info
2020-01-16 15:44:25 +00:00
massive.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
matrix-debug.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
matrix.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
mov-after-dls.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
mov-lr-terminator.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
move-def-before-start.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
move-start-after-def.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
multi-block-cond-iter-count.mir
[NFC][ARM] Add tests
2020-02-28 11:24:02 +00:00
multi-cond-iter-count.mir
[NFC][ARM] Add tests
2020-02-28 11:24:02 +00:00
multiblock-massive.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
multiple-do-loops.mir
[RDA][ARM] collectKilledOperands across multiple blocks
2020-03-03 15:23:05 +00:00
mve-float-loops.ll
Update LSR's logic that identifies a post-increment SCEV value.
2020-03-02 16:34:18 -06:00
mve-tail-data-types.ll
Update LSR's logic that identifies a post-increment SCEV value.
2020-03-02 16:34:18 -06:00
nested.ll
[ARM,MVE] Rename and clean up VCTP IR intrinsics.
2019-12-02 16:20:30 +00:00
no-dec-cbnz.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
no-dec-le-simple.ll
[ARM] LE support in ConstantIslands
2019-09-17 09:08:05 +00:00
no-dec-reorder.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
no-dec.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
no-vpsel-liveout.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
non-masked-load.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
non-masked-store.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
out-of-range-cbz.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
predicated-invariant.mir
[ARM][MVE] Validate tail predication values
2020-03-10 09:59:01 +00:00
predicated-liveout.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
remove-elem-moves.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
revert-after-call.mir
[ARM][LowOverheadLoops] Add LR def safety check
2019-09-17 12:19:32 +00:00
revert-after-read.mir
[ARM][LowOverheadLoops] Add LR def safety check
2019-09-17 12:19:32 +00:00
revert-after-write.mir
[ARM][LowOverheadLoops] Add LR def safety check
2019-09-17 12:19:32 +00:00
revert-non-header.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
revert-non-loop.mir
[ARM][LowOverheadLoops] Use tBcc when reverting
2019-09-23 08:35:31 +00:00
revert-while.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
safe-def-no-mov.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
safe-retaining.mir
[NFC][ARM] Add missing tests
2020-03-24 11:08:01 +00:00
size-limit.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
skip-debug.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
switch.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
tail-pred-const.ll
[ARM][MVE] Tail-predication: support constant trip count
2020-01-27 11:05:26 +00:00
tail-pred-narrow.ll
[ARM] MVE Tail Predication
2019-09-06 08:24:41 +00:00
tail-pred-pattern-fail.ll
[ARM] MVE Tail Predication
2019-09-06 08:24:41 +00:00
tail-pred-widen.ll
[ARM,MVE] Rename and clean up VCTP IR intrinsics.
2019-12-02 16:20:30 +00:00
tail-reduce.ll
[ARM,MVE] Rename and clean up VCTP IR intrinsics.
2019-12-02 16:20:30 +00:00
unpredicated-max.mir
[ARM][MVE] Validate tail predication values
2020-03-10 09:59:01 +00:00
unrolled-and-vector.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
unsafe-cpsr-loop-def.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
unsafe-cpsr-loop-use.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
unsafe-liveout.mir
[ARM][LowOverheadLoops] Add LR def safety check
2019-09-17 12:19:32 +00:00
unsafe-retaining.mir
[NFC][ARM] Add missing tests
2020-03-24 11:08:01 +00:00
unsafe-use-after.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
vaddv.mir
[ARM][LowOverheadLoops] Add horizontal reduction support
2020-03-30 09:55:41 +01:00
vctp16-reduce.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
vctp-add-operand-liveout.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
vctp-in-vpt-2.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
vctp-in-vpt.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
vctp-subi3.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
vctp-subri12.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
vctp-subri.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
vector-arith-codegen.ll
[ARM][LowOverheadLoops] Check loop liveouts
2020-02-19 12:59:01 +00:00
vector-reduce-mve-tail.ll
[ARM][MVE] Tail-Predication: rematerialise iteration count in exit blocks
2020-01-20 10:26:36 +00:00
vector-unroll.ll
[ARM] MVE Tail Predication
2019-09-06 08:24:41 +00:00
vmaxmin_vpred_r.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
vmldava_in_vpt.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
while-negative-offset.mir
[ARM][LowOverheadLoops] Add LR def safety check
2019-09-17 12:19:32 +00:00
while.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
wlstp.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
wrong-liveout-lsr-shift.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
wrong-vctp-opcode-liveout.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
wrong-vctp-operand-liveout.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00