Craig Topper 02f03a6fd4 [X86] Match vpmullq latency to uops.info. Correct port usage for 512-bit memory form ...

uops.info says these should be 15 cycle instructions. Uops.info also shows the 512-bit form uses port 0 and 5 for both register and memory. We had memory using 0 and 1.

Differential Revision: https://reviews.llvm.org/D75549

2020-03-03 12:16:03 -08:00

..

AArch64

[MCA] Fix test cases (NFC)

2019-11-22 16:19:58 -06:00

ARM

[ARM][Thumb2] Fix ADD/SUB invalid writes to SP

2020-01-14 11:47:19 +00:00

SystemZ

[MCA] Show aggregate over Average Wait times for the whole snippet (PR43219)

2019-10-10 14:46:21 +00:00

X86

[X86] Match vpmullq latency to uops.info. Correct port usage for 512-bit memory form

2020-03-03 12:16:03 -08:00

invalid_input_file_name.test

Replace unused output filenames with /dev/null in tests

2018-07-02 18:16:44 +00:00

lit.local.cfg

[lit] Delete empty lines at the end of lit.local.cfg NFC

2019-06-17 09:51:07 +00:00